(4)英文翻譯(英文和譯文).doc

長春工業(yè)大學人文信息學院畢業(yè)設計（論文）原文Structure and function of the MCS-51 series one-chip computerMCS-51 is a name of a piece of one-chip computer series which Intel Company produces. This company introduced 8 top-grade one-chip computers of MCS-51 series in 1980 after introducing 8 one-chip computers of MCS-48 series in 1976. It belong to a lot of kinds this line of one-chip computer the chips have,such as 8051, 8031, 8751, 80C51BH, 80C31BH,etc., their basic composition, basic performance and instruction system are all the same. 8051 daily representatives- 51 serial one-chip computersAn one-chip computer system is made up of several following parts: (1) One microprocessor of 8 (CPU). (2) At slice data memory RAM (128B/256B),it use not depositting not can reading /data that write,such as result not middle of operation, final result and data wanted to show,etc. (3) Procedure memory ROM/EPROM (4KB/8KB ), is used to preserve the procedure , some initial data and form in slice. But does not take ROM/EPROM within some one-chip computers, such as 8031 , 8032, 80C ,etc. (4) Four 8 run side by side I/O interface P0 four P3, each mouth can use as introduction , may use as exporting too. (5) Two timer / counter, each timer / counter may set up and count in the way, used to count to the external incident, can set up into a timing way too, and can according to count or result of timing realize the control of the computer. (6) Five cut off cutting off the control system of the source . (7) One all duplexing serial I/O mouth of UART (universal asynchronous receiver/transmitter (UART) ), is it realize one-chip computer or one-chip computer and serial communication of computer to use for. (8) Stretch oscillator and clock produce circuit, quartz crystal finely tune electric capacity need outer. Allow oscillation frequency as 12 megahertzs now at most. Every the above-mentioned part was joined through the inside data bus .Among them, CPU is a core of the one-chip computer, it is the control of the computer and command centre, made up of such parts as arithmetic unit and controller ,etc. The arithmetic unit can carry on 8 persons of arithmetic operation and unit ALU of logic operation while including one, the 1 storing device temporarilies of 8, storing device 2 temporarily, 8s accumulation device ACC, register B and procedure state register PSW,etc. Person who accumulate ACC count by 2 input ends entered of checking etc. temporarily as one operation often, come from person who store 1 operation is it is it make operation to go on to count temporarily , operation result and loopback ACC with another one. In addition, ACC is often regarded as the transfer station of data transmission on 8051 inside . The same as general microprocessor, it is the busiest register. Help remembering that agreeing with A expresses in the order. The controller includes the procedure counter , the order is depositted, the order decipher, the oscillator and timing circuit,etc. The procedure counter is made up of counter of 8 for two, amounts to 16. It is a byte address counter of the procedure in fact, the content is the next IA that will carried out in PC. The content which changes it can change the direction that the procedure carries out . Shake the circuit in 8051 one-chip computers, only need outer quartz crystal and frequency to finely tune the electric capacity , its frequency range is its 12MHZ of 1.2MHZ. This pulse signal, as 8051 basic beats of working, namely the minimum unit of time. 8051 is the same as other computers, the work in harmony under the control of the basic beat , just like an orchestra according to the beat play that is commanded.There are ROM (procedure memory , can only read ) and RAM in 8051 slices (data memory, can is it can write ) two to read, they have each independent memory address space, dispose way to be the same with general memory of computer. Procedure 8051 memory and 8751 slice procedure memory capacity 4KB, address begin from 0000H, used for preserving the procedure and form constant. Data 8051- 8751 8031 of memory data memory 128B, address false 00FH, use for middle result to deposit operation, the data are stored temporarily and the data are buffered etc. In RAM of this 128B, there is unit of 32 byteses that can be appointed as the job register, this and general microprocessor is different, 8051 slice RAM and job register rank one formation the same to arrange the location. It is not very the same that the memory of MCS-51 series one-chip computer and general computer disposes the way in addition. General computer for first address space, ROM and RAM can arrange in different space within the range of this address at will , namely the addresses of ROM and RAM, with distributing different address space in a formation. While visiting the memory, corresponding and only an address Memory unit,can ROM, it can be RAM too, and by visiting the order similarly. This kind of memory structure is called the structure of Princeton. 8051 memories are divided into procedure memory space and data memory space on the physics structure, there are four memory spaces in all: The procedure stores in one and data memory space outside data memory and one in procedure memory space and one outside one, the structure forms of this kind of procedure device and data memory separated form data memory, called Harvard structure. But use the angle from users, 8051 memory address space is divided into three kinds: ( 1) In the slice , arrange blocks of FFFFH , 0000H of location , in unison outside the slice (use 16 addresses). ( 2) The data memory address space outside one of 64KB, the address is arranged from 0000H 64KB FFFFH (with 16 addresses ) too to the location. ( 3) Data memory address space of 256B (use 8 addresses). Three above-mentioned memory space addresses overlap, for distinguishing and designing the order symbol of different data transmission in the instruction system of 8051: CPU visit slice, ROM order spend MOVC , visit block RAM order uses MOVX outside the slice, RAM order uses MOV to visit in slice.8051 one-chip computer have four 8 walk abreast I/O port , call P0, P1, P2 and P3. Each port is 8 accurate two-way mouths, accounts for 32 pins altogether. Every one I/O line can be used as introduction and exported independently. Each port includes a latch (namely special function register ), one exports the driver and a introduction buffer . Make data can latch when outputting , data can buffer when making introduction , but four function of passway these self-same. Expand among the system of memory outside having slice, four port these may serve as accurate two-way mouth of I/O in common use. Expand among the system of memory outside having slice, P2 mouth see high 8 address off; P0 mouth is a two-way bus , send the introduction of 8 low addresses and data / export in timesharing The circuit of 8051 one-chip computers and four I/O ports is very ingenious in design. Familiar with I/O port logical circuit, not only help to use ports correctly and rationally , and will inspire to designing the peripheral logical circuit of one-chip computer to some extent . Load ability and interface of port have certain requirement, because output grade, P0 of mouth and P1 end output, P3 of mouth grade different at structure, so, the load ability and interface of its door demand to have nothing in common with each other. P0 mouth is different from other mouths, its output grade draws the resistance supremly . When using it as the mouth in common use to use , output grade is it leak circuit to turn on , is it is it urge NMOS draw the resistance on taking to be outer with it while inputting to go out to fail. When being used as introduction , should write 1 to a latch first . Every one with P0 mouth can drive 8 Model LS TTL load to export. P1 mouth is an accurate two-way mouth too, used as I/O in common use . Different from P0 mouth output of circuit its, draw load resistance link with power on inside have. In fact, the resistance is that two effects are in charge of FET and together: One FET is in charge of load, its resistance is regular. Another one can is it lead to work with close at two state , make its President resistance value change approximate 0 or group value heavy two situation very. When it is 0 that the resistance is approximate , can draw the pin to the high level fast ; When resistance value is very large, P1 mouth, in order to hinder the introduction state high. Output as P1 mouth high electricity at ordinary times , can is it draw electric current load to offer outwards , draw the resistance on neednt answer and thenning. Here When the port is used as introduction , must write into 1 to the corresponding latch first too, make FET end . Relatively about 20,000 ohms because of the load resistance in scene and because 40,000 ohms, will not exert an influence on the data that are input . The structure of P2 some mouth is similar to P0 mouth, there are MUX switches. Is it similar to mouth partly to urge, but mouth large a conversion controls some than P1. P3 mouth one multi-functional port, mouth getting many than P1 it have and 3 door and 4 buffer. Two part these, make her besides accurate two-way function with P1 mouth just, can also use the second function of every pin . and door 3 function one switch in fact, it determines to be to output data of latch to output second signal of function. Act as W =At 1 oclock, output Q end signal; Act as Q =At 1 oclock, can output W line signal . At the time of programming, it is that the first function is still the second function but neednt have software that set up P3 mouth in advance . It hardware not inside is the automatic to have two function outputted when CPU carries on SFR and seeks the location (the location or the byte ) to visit to P3 mouth /at not lasting lining, there are inside hardware latch Qs =1.The operation principle of P3 mouth is similar to P1 mouth.Output grade , P3 of mouth , P1 of P1 , connect with inside have load resistance of drawing , every one of they can drive 4 Model LS TTL load to output. As while inputting the mouth, any TTL or NMOS circuit can drive P1 of 8051 one-chip computers as P3 mouth in a normal way . Because draw resistance on output grade of them have, can open a way collector too or drain-source resistance is it urge to open a way, do not need to have the resistance of drawing outerly . Mouths are all accurate two-way mouths too. When the conduct is input, must write the corresponding port latch with 1 first . As to 80C51 one-chip computer, port can only offer milliampere of output electric currents, is it output mouth go when urging one ordinary basing of transistor to regard as, should contact a resistance among the port and transistor base , in order to the electricity while restraining the high level from exporting P1P3 Being restored to the throne is the operation of initializing of an one-chip computer. Its main function is to turn PC into 0000H initially , make the one-chip computer begin to hold the conduct procedure from unit 0000H. Except that the ones that enter the system are initialized normally,as because procedure operate it make mistakes or operate there arent mistake, in order to extricate oneself from a predicament , need to be pressed and restored to the throne the key restarting too. It is an input end which is restored to the throne the signal in 8051 China RST pin. Restore to the throne signal high level effective , should sustain 24 shake cycle (namely 2 machine cycles ) the above its effective times. If 6 of frequency of utilization brilliant to shake, restore to the throne signal duration should exceed 4 delicate to finish restoring to the throne and operating. Produce the logic picture of circuit which is restored to the throne the signal:Restore to the throne the circuit and include two parts outside in the chip entirely. Outside that circuit produce to restore to the throne signal (RST ) hand over to Schmitts trigger, restore to the throne circuit sample to output , Schmitt of trigger constantly in each S5P2 , machine of cycle in having one more , then just got and restored to the throne and operated the necessary signal insidly. Restore to the throne resistance of circuit generally, electric capacity parameter suitable for 6 brilliant to shake, can is it restore to the throne signal high level duration greater than 2 machine cycles to guarantee. Being restored to the throne in the circuit is simple, its function is very important. Pieces of one-chip computer system could normal running,should first check it can restore to the throne not succeeding. Checking and can pop ones head and monitor the pin with the oscillograph tentatively, push and is restored to the throne the key, the wave form that observes and has enough range is exported (instantaneous), can also through is it restore to the throne circuit group holding value carry on the experiment to chan.- 3 -譯文MCS-51系列單片機的結(jié)構(gòu)及功能MCS-51是Intel公司生產(chǎn)的一個單片機系列的名稱。該公司繼1976年推出MCS-48系列8位單片機之后，又于1980年推出了MCS-51系列高檔8位單片機。屬于這一系列的單片機芯片有個單片機系統(tǒng)有以下幾部分組成：1）一個8位的微處理器(CPU).2）片內(nèi)數(shù)據(jù)存儲器RAM(128B/256B)，用以存放可以讀/寫的數(shù)據(jù)，如運算的中間結(jié)果，最終結(jié)果以及欲顯示的數(shù)據(jù)等。3）片內(nèi)程序存儲器ROM/EPROM(4KB/8KB)，用以存放程序，一些原始數(shù)據(jù)和表格。但也有一些單片機內(nèi)部不帶ROM/EPROM，如8031，8032，80C等。4）四個8位并行I/O接口P0-P3，每個口既可以用作輸入，也可以用作輸出。5）兩個定時器/計數(shù)器，每個定時器/計數(shù)器都可以設置成計數(shù)方式，用以對外部件進行計數(shù)，也可以設置成定時方式，并可以根據(jù)計數(shù)或定時的結(jié)果實現(xiàn)計算機的控制。6）五個中斷源的中斷控制系統(tǒng)。7）一個全雙工UART（通用異步接收發(fā)送器）的串行I/O口，用于實現(xiàn)單片機之間或單片機與微機之間的串行通信。8）片內(nèi)振蕩器和時鐘產(chǎn)生電路，但石英晶體和微調(diào)電容需要外接。最高允許振蕩頻率為12兆赫茲。以上各部分是通過內(nèi)部數(shù)據(jù)總線相連接的。 其中，CPU是單片機的核心，是計算機的控制和指揮中心，有運算器和控制器等部件組成。運算器包括一個可進行8位算術運算和邏輯運算的單元ALU，8位的暫存器1，暫存器2，8位的累加器ACC，寄存器B和程序狀態(tài)寄存器PSW等.累加器ACC經(jīng)常作為一個運算數(shù)經(jīng)暫存器2進入的輸入端，與另一個來自暫存器1的運算數(shù)進行運算，運算結(jié)果又回送ACC。除此之外，ACC在8051內(nèi)部經(jīng)常作為數(shù)據(jù)傳送的中轉(zhuǎn)站。同一般微處理器一樣，它是最繁忙的一個寄存器了。在指令中助記符A來表示?？刂破靼ǔ绦蛴嫈?shù)器，指令寄存，指令譯碼，振蕩器及定時電路等。程序計數(shù)器有兩個8位的計數(shù)器組成，共16位。它實際上是程序的字節(jié)地址計數(shù)器，PC中內(nèi)容是將要執(zhí)行的下一條指令地址。改變它的內(nèi)容就可改變程序執(zhí)行的方向。在8051單片機內(nèi)有振蕩電路，只需外接石英晶體和頻率微調(diào)電容，其頻率范圍是1.2MHZ-12MHZ.該脈沖信號就作為8051工作的基本節(jié)拍，即時間的最小單位。8051同其他計算機一樣，在基本節(jié)拍的控制下協(xié)調(diào)的工作，就象一個樂隊按著指揮的節(jié)拍演奏一樣。8051片內(nèi)有ROM（程序存儲器，只能讀）和RAM（數(shù)據(jù)存儲器，可讀可寫）兩類，它們有各自獨立的存儲地址空間，與一般微機的存儲器配置方式不相同。程序存儲器 8051及8751的片內(nèi)程序存儲器容量為4KB，地址從0000H開始，用于存放程序和表格常數(shù)。數(shù)據(jù)存儲器 8051及8751 8031片內(nèi)數(shù)據(jù)存儲器均為128B，地址偽00-7FH，用于存放運算的中間結(jié)果，數(shù)據(jù)暫存以及數(shù)據(jù)緩沖等。在這128B的RAM中，有32個字節(jié)單元可指定為工作寄存器，這同一般微處理器不同，8051的片內(nèi)RAM和工作寄存器排在一個隊列里同一編址。另外MCS-51系列單片機與一般微機的存儲器配置方式很不相同。一般微機通常只有一個地址空間，ROM和RAM可以隨意安排在這一地址范圍內(nèi)不同空間，即ROM和RAM的地址同在一個隊列里分配不同的地址空間。訪問存儲器時，一個地址對應唯一的存儲器單元，可以是ROM，也可以是RAM，并用同類訪問指令。此種存儲器結(jié)構(gòu)稱為普林斯頓結(jié)構(gòu)。8051的存儲器在物理結(jié)構(gòu)上分為程序存儲器空間和數(shù)據(jù)存儲器空間，共有四個存儲空間：片內(nèi)程序存儲和片外程序存儲空間以及片內(nèi)數(shù)據(jù)存儲器和片外數(shù)據(jù)存儲器空間，這種程序器和數(shù)據(jù)存儲器和數(shù)據(jù)存儲器分開的結(jié)構(gòu)形式，稱為哈佛結(jié)構(gòu)。但從用戶使用角度，8051存儲器地址空間分為三類：1)片內(nèi)，片外統(tǒng)一編址0000H-FFFFH（用16位地址）。2)64KB片外數(shù)據(jù)存儲器地址空間，地址也從0000H-FFFFH（用16位地址）編址。3)256B數(shù)據(jù)存儲器地址空間（用8位地址）。前述的三個存儲器空間地址是重疊的，為了區(qū)分起見在8051的指令系統(tǒng)設計了不同數(shù)據(jù)傳送指令符號：CPU訪問片內(nèi)，片外ROM指令用MOVC，訪問片外RAM指令用MOVX，訪問片內(nèi)RAM指令用MOV.8051單片機有四個8位并行I/O端口，稱P0,P1,P2和P3。每個端口都是8位準雙向口，共占32只引腳。每一條I/O線都能獨立地用作輸入和輸出。每個端口都包括一個鎖存器（即特殊功能