FPGA創(chuàng)新實(shí)驗(yàn)設(shè)計(jì)報(bào)告

1、 數(shù)字電子技術(shù)實(shí)驗(yàn)課程FPGA創(chuàng)新實(shí)驗(yàn)設(shè)計(jì)報(bào)告設(shè)計(jì)名稱 上下課鈴聲模擬系統(tǒng) 姓 名 林嘉穎 金延鑫 學(xué) 號(hào) 3090100768 3090104182 專業(yè)班級(jí) 機(jī)械電子工程0902 指導(dǎo)教師 樊偉敏 日 期 2011.6.6 大學(xué)電工電子基礎(chǔ)實(shí)驗(yàn)中心一摘要 通過(guò)QUATURS 軟件的程序編譯與FPGA的應(yīng)用，模擬出大學(xué)紫金港校區(qū)的上下課鈴系統(tǒng)。該系統(tǒng)分為兩部分：電子鐘部分和鈴聲部分電子鐘部分將實(shí)現(xiàn)二十四小時(shí)計(jì)時(shí)，時(shí)間設(shè)置等功能。鈴聲部分將實(shí)現(xiàn)特定時(shí)間（如上課時(shí)間）響起特定鈴聲功能。二 關(guān)鍵詞 時(shí)序電路 時(shí)鐘系統(tǒng) 調(diào)節(jié)裝置 聲音系統(tǒng) QUATURS應(yīng)用三 正文上下課鈴聲系統(tǒng)時(shí)鐘系統(tǒng)鈴聲系統(tǒng)時(shí)鐘

2、部分鈴聲選擇時(shí)鐘調(diào)試分頻器音頻轉(zhuǎn)換音頻調(diào)試觸發(fā)器上下課鈴聲3.1 設(shè)計(jì)思路整個(gè)上下課鈴響可分為時(shí)鐘系統(tǒng)和鈴聲系統(tǒng)兩大部分。時(shí)鐘系統(tǒng)：時(shí)鐘部分分為鈴聲選擇器，時(shí)間調(diào)試部分，時(shí)鐘部分等三大模塊。1時(shí)鐘部分時(shí)鐘部分實(shí)現(xiàn)24小時(shí)時(shí)鐘運(yùn)行與循環(huán)功能，按照1：60時(shí)間進(jìn)行縮放，其中LED燈表示小時(shí)數(shù)，采用24進(jìn)制計(jì)數(shù)器實(shí)現(xiàn)；led燈兩位表示分鐘數(shù)，采用60進(jìn)制計(jì)數(shù)器實(shí)現(xiàn)，計(jì)數(shù)頻率設(shè)置為1HZ，以節(jié)省時(shí)間。此部分設(shè)置能完全模擬時(shí)鐘循環(huán)功能，即分鐘部分逢六十進(jìn)一，時(shí)鐘部分逢24歸零，同時(shí)23：59后自動(dòng)返回00:002 時(shí)間調(diào)試部分時(shí)間調(diào)試部分實(shí)現(xiàn)時(shí)間暫停，移位調(diào)試時(shí)間（其中移到的位置會(huì)發(fā)生閃爍），時(shí)間設(shè)置等

3、功能，具有調(diào)試目標(biāo)明確，調(diào)試時(shí)間不會(huì)超過(guò)時(shí)鐘表示圍等優(yōu)點(diǎn)。使用方法：將clr置為0之后，可以發(fā)現(xiàn)時(shí)鐘十位在閃爍，此時(shí)通過(guò)按trf鍵可以將閃爍點(diǎn)移到下一個(gè)即時(shí)鐘個(gè)位，以此類推。在移到自己想調(diào)節(jié)的位置以后通過(guò)按住plus鍵，每一個(gè)秒脈沖之后可以發(fā)現(xiàn)該數(shù)加一，加到九跳回一。通過(guò)一些條件語(yǔ)句，防止了當(dāng)時(shí)鐘十位等于2時(shí)，時(shí)鐘個(gè)位不會(huì)大于3；時(shí)鐘個(gè)位大于3時(shí)，時(shí)鐘十位不會(huì)等于2。3 鈴聲選擇器：根據(jù)紫金港校區(qū)上下課的時(shí)間，制成鈴聲選擇器。以下為響鈴時(shí)間安排表：上課鈴下課鈴8:008:458:509:359:5010:3510:4011:2511:3012:1513:1514:0014:0514:5014:

4、5515:4015:5516:4016:4517:3018:3019:1519:2020:0520:1020:55根據(jù)時(shí)間表在相應(yīng)時(shí)間，鈴聲響起。鈴聲部分鈴聲部分分為JK觸發(fā)器，分頻器，鈴聲部分，選擇器，音頻調(diào)試，音頻轉(zhuǎn)換器，六個(gè)模塊。1 分頻器分頻器將50MHZ的脈沖電路調(diào)節(jié)到合適的頻率，在鈴聲系統(tǒng)部分中需使用兩次，一次為對(duì)上下課鈴音頻電路的觸發(fā)（1HZ）,一次為音頻轉(zhuǎn)換器的觸發(fā)（6250000HZ）.2 鈴聲部分鈴聲部分設(shè)置成上課鈴和下課鈴兩個(gè)子模塊，分別存放上下課鈴的樂(lè)譜。3音頻調(diào)試電路根據(jù)十二平均律將兩個(gè)八度共十六個(gè)音符設(shè)置成相應(yīng)的頻率。使其轉(zhuǎn)換成相應(yīng)的音高。4音頻轉(zhuǎn)換器原理為一個(gè)計(jì)數(shù)

5、器，通過(guò)脈沖電路將每次的音符轉(zhuǎn)換成相應(yīng)的頻率，通過(guò)小喇叭輸出。5 JK觸發(fā)器整個(gè)音樂(lè)系統(tǒng)的開(kāi)始與停止通過(guò)兩個(gè)JK觸發(fā)器來(lái)控制。原理如圖當(dāng)選擇器發(fā)出信號(hào)時(shí)，第一個(gè)JK觸發(fā)器中J通道接高，K通道為0，Q輸出高電平，使第二個(gè)JK觸發(fā)器觸發(fā)（第二個(gè)JK觸發(fā)器設(shè)置成T觸發(fā)器）此后即使第一個(gè)觸發(fā)器中J=0.Q1狀態(tài)保持，仍為1.在鈴聲部分設(shè)置邏輯出口K,當(dāng)輸出最后一個(gè)音符時(shí)，k=1,反饋到第一個(gè)JK觸發(fā)器的K端上，此時(shí)Q1=0，使第二個(gè)觸發(fā)器清零，停止向鈴聲部分輸送脈沖信號(hào)。鈴聲停止。32實(shí)驗(yàn)原理圖展示時(shí)鐘部分鈴聲部分綜合電路3.3仿真波形與分析Trf仿真波形由圖可知，每一個(gè)trf下降沿使trfo從3減到

6、0再到3從而實(shí)現(xiàn)循環(huán)，當(dāng)clr變?yōu)?了之后，trfo立即變?yōu)?。SS仿真波形15為變暗。由圖可知，假定plus鍵按住，trfo為3，因此h_hi從0開(kāi)始加到5，然后放開(kāi)plus之后h_hi交替5與15，說(shuō)明正在閃爍。假定當(dāng)按下trf，trfo變?yōu)?，即閃爍從h_hi改為h_lo，同樣trfo為1時(shí)，閃爍m_hi。SZ仿真波形上三圖為時(shí)鐘正常工作時(shí)的輸出。上圖為當(dāng)clr為1，按plus的時(shí)候，當(dāng)trfo為3,2,1時(shí)h_hi，h_lo，m_hi的數(shù)值的增加。Lj仿真波形當(dāng)時(shí)間為08:00,08:45時(shí)分別輸出tmp1，tmp2為10和01，當(dāng)下一個(gè)脈沖到來(lái)，08:00變成00:00之后，tmp1

7、，tmp2為00。通過(guò)tmp1與tmp2實(shí)現(xiàn)上下課鈴的控制。Nacklass，vorklass仿真波形通過(guò)clk可以實(shí)現(xiàn)放歌曲，當(dāng)歌曲結(jié)束時(shí)k=1，此時(shí)通過(guò)jk觸發(fā)器使clk停止，等到下一個(gè)lj模塊中的tmp1，tmp2的信號(hào)到來(lái)，clk重新開(kāi)始，此時(shí)通過(guò)條件語(yǔ)句時(shí)cnt歸零，重新放歌曲。3.4源程序與注釋1 分頻器（50MHZ=>8MHZ）LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;ENTITY fenpinqi ISPORT(clk:IN STD_LOGIC;clk_out:OUT STD_LOGIC);END fenpinqi;ARCHITEC

8、TURE fwm OF fenpinqi ISCONSTANT m : INTEGER:=4;-when we need 8M HZ。INTEGER=6250000when we need 2HZSIGNAL tmp :STD_LOGIC;BEGINPROCESS(clk, tmp)VARIABLE cout : INTEGER:=0;BEGIN IF clk'EVENT AND clk='1' THEN cout:=cout+1;IF cout<=m THEN tmp<='0'ELSIF cout<m*2 THEN tmp<=&

9、#39;1'ELSE cout:=0;END IF; END IF; END PROCESS; clk_out<=tmp;END fwm;2 JK觸發(fā)器LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;ENTITY JANDK ISPORT (clr,clk,j,k:IN STD_LOGIC; q, qn : out STD_LOGIC); END JANDK; ARCHITECTURE CONTROL OF JANDK ISSIGNAL TMP : STD_LOGIC;BEGINPROCESS(clr,clk,j,k)BEGIN if clr=&

10、#39;0' then TMP<='0'elsIF (clk'EVENT AND clk='0') THENIF (j='1')and(k='1')then TMP<= NOT TMP;-J=1K=1翻轉(zhuǎn)）ELSIF (j='1')and(k='0')then TMP<= '1' -J=1K=0置高ELSIF (j='0')and(k='1')then TMP<= '0' -J=1K=1置零END

11、 IF;END IF;END PROCESS;q<= TMP;qn<= NOT TMP;END CONTROL;3下課鈴LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;ENTITY nachklass ISPORT( clk,temp1:IN STD_LOGIC;tone_index:OUT INTEGER RANGE 0 TO 15;k:OUT STD_LOGIC);END nachklass;ARCHITECTURE melody OF nachklass ISSIGNALt:INTEGER RANGE 0 TO 49:=0;signal kk

12、:STD_LOGIC:='0'BEGINPROCESS(clk,cnt)BEGINIF(clk'EVENT AND clk='1')THENt<=cnt+1;END IF;IF (cnt=48)THENkk<='1'-k=1的時(shí)候，通過(guò)jk觸發(fā)器使時(shí)鐘停止（J=0K=1，第一個(gè)時(shí)鐘置零，接到第二個(gè)時(shí)鐘清零端，實(shí)現(xiàn)下課鈴的停止）else kk<='0'END IF;CASEt IS -此項(xiàng)用來(lái)存樂(lè)譜 下課鈴聲WHEN 01 =>tone_index<=5;WHEN 02 =>tone_in

13、dex<=6; WHEN 03 =>tone_index<=7;WHEN 04 =>tone_index<=8;WHEN 05 =>tone_index<=9; WHEN 06 =>tone_index<=9;WHEN 07 =>tone_index<=5;WHEN 08 =>tone_index<=5; WHEN 09 =>tone_index<=8;WHEN 10 =>tone_index<=7; WHEN 11 =>tone_index<=6; WHEN 12 =>to

14、ne_index<=4;WHEN 13 =>tone_index<=5; WHEN 14 =>tone_index<=5; WHEN 15 =>tone_index<=5; WHEN 16 =>tone_index<=5; WHEN 17 =>tone_index<=5;WHEN 18 =>tone_index<=6; WHEN 19 =>tone_index<=7;WHEN 20 =>tone_index<=8;WHEN 21 =>tone_index<=9; WHEN 22 =

15、>tone_index<=9;WHEN 23 =>tone_index<=5;WHEN 24 =>tone_index<=5; WHEN 25 =>tone_index<=8;WHEN 26 =>tone_index<=7; WHEN 27 =>tone_index<=6; WHEN 28 =>tone_index<=4;WHEN 29 =>tone_index<=5; WHEN 30 =>tone_index<=5; WHEN 31 =>tone_index<=5; WHE

16、N 32 =>tone_index<=5;WHEN 33 =>tone_index<=5;WHEN 34 =>tone_index<=6; WHEN 35 =>tone_index<=7;WHEN 36 =>tone_index<=8;WHEN 37 =>tone_index<=9; WHEN 38 =>tone_index<=9;WHEN 39 =>tone_index<=5;WHEN 40 =>tone_index<=5; WHEN 41 =>tone_index<=8;

17、WHEN 42 =>tone_index<=7; WHEN 43 =>tone_index<=6; WHEN 44 =>tone_index<=4;WHEN 45 =>tone_index<=5; WHEN 46 =>tone_index<=5; WHEN 47 =>tone_index<=5; when 48 =>tone_index<=0;WHEN OTHERS =>tone_index<=0;END CASE;ift=49 thent<=0;end if;k<=kk;-通過(guò)給cnt

18、重新賦值實(shí)現(xiàn)第二次上下課鈴聲的開(kāi)始。當(dāng)?shù)诙€(gè)時(shí)間點(diǎn)到來(lái)，-輸入的tmp1tmp2的改變使時(shí)鐘重新走起來(lái)，使cnt從48變成49從而賦值為0，-從而可以再循環(huán)至48.END PROCESS;END melody;4上課鈴聲（原理同下課鈴）LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;ENTITY vorklass ISPORT( clk,temp1:IN STD_LOGIC;tone_index:OUT INTEGER RANGE 0 TO 15;k:OUT STD_LOGIC);END vorklass;ARCHITECTURE melody OF vork

19、lass ISSIGNALt:INTEGER RANGE 0 TO 49:=0;signal kk:STD_LOGIC:='0'BEGINPROCESS(clk,cnt)BEGINIF(clk'EVENT AND clk='1')THENt<=cnt+1;END IF;IF (cnt=48)THENkk<='1'-k=1的時(shí)候，通過(guò)jk觸發(fā)器使時(shí)鐘停止，實(shí)現(xiàn)上下課鈴的停止else kk<='0'END IF;CASEt IS -此項(xiàng)用來(lái)存樂(lè)譜 上課鈴聲WHEN 01 =>tone_index<

20、=9;WHEN 02 =>tone_index<=10; WHEN 03 =>tone_index<=9;WHEN 04 =>tone_index<=7;WHEN 05 =>tone_index<=8; WHEN 06 =>tone_index<=9;WHEN 07 =>tone_index<=8;WHEN 08 =>tone_index<=6; WHEN 09 =>tone_index<=5;WHEN 10 =>tone_index<=5; WHEN 11 =>tone_inde

21、x<=7; WHEN 12 =>tone_index<=9;WHEN 13 =>tone_index<=12; WHEN 14 =>tone_index<=12; WHEN 15 =>tone_index<=12; WHEN 16 =>tone_index<=12; WHEN 17 =>tone_index<=9;WHEN 18 =>tone_index<=10; WHEN 19 =>tone_index<=9;WHEN 20 =>tone_index<=7;WHEN 21 =&g

22、t;tone_index<=8; WHEN 22 =>tone_index<=9;WHEN 23 =>tone_index<=8;WHEN 24 =>tone_index<=6; WHEN 25 =>tone_index<=5;WHEN 26 =>tone_index<=5; WHEN 27 =>tone_index<=7; WHEN 28 =>tone_index<=9;WHEN 29 =>tone_index<=12; WHEN 30 =>tone_index<=12; WHE

23、N 31 =>tone_index<=12; WHEN 32 =>tone_index<=12;WHEN 33 =>tone_index<=9;WHEN 34 =>tone_index<=10; WHEN 35 =>tone_index<=9;WHEN 36 =>tone_index<=7;WHEN 37 =>tone_index<=8; WHEN 38 =>tone_index<=9;WHEN 39 =>tone_index<=8;WHEN 40 =>tone_index<

24、=6; WHEN 41 =>tone_index<=5;WHEN 42 =>tone_index<=5; WHEN 43 =>tone_index<=7; WHEN 44 =>tone_index<=9;WHEN 45 =>tone_index<=12; WHEN 46 =>tone_index<=12; WHEN 47 =>tone_index<=12; when 48 =>tone_index<=0;WHEN OTHERS =>tone_index<=0;END CASE;ift=4

25、9 thent<=0;end if;k<=kk;-通過(guò)給cnt重新賦值實(shí)現(xiàn)第二次上下課鈴聲的開(kāi)始。當(dāng)?shù)诙€(gè)時(shí)間點(diǎn)到來(lái)，-輸入的tmp1tmp2的改變使時(shí)鐘重新走起來(lái)，使cnt從48變成49從而賦值為0，-從而可以再循環(huán)至48.END PROCESS;END melody;5 音調(diào)調(diào)試電路LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;ENTITY tone ISPORT(index: IN INTEGER RANGE 0 TO 15; code:OUT INTEGER RANGE 0 TO 15; -定義錯(cuò)的輸出引腳high21:OUT STD_L

26、OGIC;-定義high21輸出引腳tone:OUT INTEGER RANGE 0 TO 16#7FF#);-定義tone輸出引腳END tone;ARCHITECTURE one OF tone ISBEGINsearch:PROCESS(index)BEGINCASE index IS-此項(xiàng)用來(lái)檢索音調(diào)的頻率，高八度和低八度 共十六個(gè)音符WHEN 0 =>tone<=2047;code<=0;high21<='0'WHEN 1 =>tone<=773;code<=1;high21<='0'WHEN 2 =&g

27、t;tone<=912;code<=2;high21<='0'WHEN 3 =>tone <=1036;code<=3;high21<='0'WHEN 4 =>tone <=1116;code<=4;high21<='0'WHEN 5 =>tone <=1197;code<=5;high21<='0'WHEN 6 =>tone <=1290;code<=6;high21<='0'WHEN 7 =>

28、tone <=1372;code<=7;high21<='0'WHEN 8 =>tone <=1410;code<=1;high21<='1'WHEN 9 =>tone <=1480;code<=2;high21<='1'WHEN 10 =>tone <=1542;code<=3;high21<='1'WHEN 11 =>tone <=1590;code<=4;high21<='1'WHEN 12 =&

29、gt;tone <=1622;code<=5;high21<='1'WHEN 13 =>tone <=1668;code<=6;high21<='1'WHEN 14 =>tone <=1692;code<=7;high21<='1'WHEN 15 =>tone <=1728;code<=1;high21<='1'WHEN OTHERS => NULL;END CASE;END PROCESS;END;6 音頻輸出電路LIBRARY IE

30、EE;USE IEEE.STD_LOGIC_1164.ALL;ENTITY exchange ISPORT(clk:IN STD_LOGIC;tone:IN INTEGER RANGE 0 TO 16#7FF#;spks:OUT STD_LOGIC);END exchange;ARCHITECTURE behav OF exchange IS SIGNAL pre_clk,full_spks:STD_LOGIC;BEGINdiv_clk:PROCESS(clk)VARIABLEt4:INTEGER RANGE 0 TO 15;BEGINpre_clk<='0'IFt4&g

31、t;11 THEN pre_clk<='1'cnt4:=0;ELSIF clk'EVENT AND clk='1' THENt4:=cnt4+1;-通過(guò)時(shí)鐘實(shí)現(xiàn)計(jì)數(shù)器功能算出頻率，進(jìn)行輸出）END IF;END PROCESS;gen_spks:PROCESS(pre_clk,tone)VARIABLEt11:INTEGER RANGE 0 TO 16#7FF#;BEGINIF pre_clk'EVENT AND pre_clk='1' THENIFt11=16#7FF# THENt11:=tone;full_spks<

32、;='1'ELSEt11:=cnt11+1;full_spks<='0'END IF;END IF;END PROCESS;delay_spks:PROCESS(full_spks)VARIABLEt2:STD_LOGIC;BEGINIF full_spks'EVENT AND full_spks='1' THENt2:=NOTt2;IFt2='1' THEN spks<='1'ELSE spks<='0'END IF;END IF;END PROCESS;END beha

33、v;7時(shí)間調(diào)節(jié)電路調(diào)節(jié)位置選擇器LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;USE IEEE.STD_LOGIC_UNSIGNED.ALL;ENTITY trf ISPORT(trf,clr:IN STD_LOGIC;-clr為1時(shí)，表停止，調(diào)節(jié)時(shí)間，trf調(diào)節(jié)時(shí)間位數(shù)trf_temp為 00 01 10 11時(shí)各表示 分個(gè)位，分十位，時(shí)個(gè)位，時(shí)十位。trfo: OUT STD_LOGIC_VECTOR(1 DOWNTO 0);END trf;ARCHITECTURE fwm OF trf ISSIGNAL trf_temp : STD_LOGIC_VEC

34、TOR(1 DOWNTO 0);BEGINPROCESS(clr,trf,trf_temp)beginif clr='0' thentrf_temp<="11"elsif (trf'EVENT AND trf='0') then-通過(guò)脈沖，實(shí)移位。 由輸出trfo實(shí)現(xiàn)閃爍與加數(shù)。if trf_temp>"00" then trf_temp<=trf_temp-1;else trf_temp<="11"end if;end if;end process;trfo<=t

35、rf_temp;end fwm;8 時(shí)間調(diào)節(jié)電路調(diào)節(jié)數(shù)字選擇器與時(shí)鐘LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;USE IEEE.STD_LOGIC_UNSIGNED.ALL;ENTITY SZ IS-clk時(shí)鐘脈沖,clr暫?？刂?trf移位,plus加數(shù)字,h_lo時(shí)位低位,h_hi時(shí)位高位,m_lo分位低位,m_hi分位高位PORT(clk,plus,clr:IN STD_LOGIC;trfo:IN STD_LOGIC_VECTOR(1 DOWNTO 0);h_lo,h_hi,m_lo,m_hi : OUT STD_LOGIC_VECTOR(3 DO

36、WNTO 0);END SZ;ARCHITECTURE fwm OF SZ ISSIGNAL h_hi_temp,h_lo_temp,m_hi_temp,m_lo_temp : STD_LOGIC_VECTOR(3 DOWNTO 0);BEGINPROCESS(clk,clr,trfo,plus,h_hi_temp,h_lo_temp,m_hi_temp,m_lo_temp)-clk上升沿觸發(fā),clr='1'暫停調(diào)時(shí)間,trf='0'移位,plus='0'加數(shù)beginif (clk'EVENT AND clk='1')

37、thenif clr='1' thenif plus='0' then -通過(guò)按住plus 每個(gè)秒脈沖加數(shù)，位數(shù)由trfo控制if trfo="00" then -trfo=00 分個(gè)位加數(shù)if m_lo_temp="1001" then m_lo_temp<="0000"else m_lo_temp<=m_lo_temp+1;end if;elsif trfo="01" then-trfo=01 分十位加數(shù)if m_hi_temp="0101" th

38、en m_hi_temp<="0000"else m_hi_temp<=m_hi_temp+1;end if;elsif trfo="10" then-trfo=10 時(shí)個(gè)位加數(shù) 時(shí)個(gè)位與時(shí)十位有關(guān)，當(dāng)時(shí)十位為2時(shí)，時(shí)個(gè)位不應(yīng)超過(guò)3，因?yàn)闆](méi)有比24點(diǎn)更高的時(shí)間if h_hi_temp="0010" thenif h_lo_temp="0011" then h_lo_temp<="0000"else h_lo_temp<=h_lo_temp+1;end if;elseif

39、h_lo_temp="1001" then h_lo_temp<="0000"else h_lo_temp<=h_lo_temp+1;end if;end if;elsif trfo="11" then-trfo=11 時(shí)十位加數(shù) 時(shí)十位與時(shí)個(gè)位有關(guān)，當(dāng)時(shí)個(gè)位為大于3時(shí)，時(shí)十位不應(yīng)超過(guò)1，否則可能造成25點(diǎn)，26點(diǎn)等等if h_lo_temp<"0100" thenif h_hi_temp="0010" then h_hi_temp<="0000"el

40、se h_hi_temp<=h_hi_temp+1;end if;else if h_hi_temp="0001" then h_hi_temp<="0000"else h_hi_temp<="0001"end if;end if;end if;end if;else -clr=0時(shí)，時(shí)鐘正常工作if m_lo_temp<"1001" then m_lo_temp<=m_lo_temp+1; -分個(gè)位else -分十位if m_hi_temp<"0101" t

41、hen m_lo_temp<="0000"m_hi_temp<=m_hi_temp+1;else -時(shí)個(gè)位 與時(shí)十位有關(guān) 當(dāng)時(shí)十位為2時(shí)，應(yīng)在3之后變?yōu)?，其余9之后變0if h_hi_temp<"0010" thenif h_lo_temp<"1001" thenm_lo_temp<="0000"m_hi_temp<="0000"h_lo_temp<=h_lo_temp+1;elsem_lo_temp<="0000"m_hi_

42、temp<="0000"h_lo_temp<="0000"h_hi_temp<=h_hi_temp+1;end if;else -時(shí)十位if h_lo_temp<"0010" thenh_lo_temp<=h_lo_temp+1;m_lo_temp<="0000"m_hi_temp<="0000"elsem_lo_temp<="0000"m_hi_temp<="0000"h_lo_temp<=&q

43、uot;0000"h_hi_temp<="0000"end if;end if;end if;end if;end if;end if;END PROCESS;h_hi<=h_hi_temp;h_lo<=h_lo_temp;m_hi<=m_hi_temp;m_lo<=m_lo_temp;END fwm;9 閃爍電路LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;ENTITY SS IS -通過(guò)閃爍來(lái)實(shí)現(xiàn)在加數(shù)的時(shí)候能知道自己所加的數(shù)的位置PORT(clk,clr,plus,trf:IN STD_LOG

44、IC;trfo:IN STD_LOGIC_VECTOR(1 DOWNTO 0);h_lo,h_hi,m_lo,m_hi:IN STD_LOGIC_VECTOR(3 DOWNTO 0);oh_lo,oh_hi,om_lo,om_hi:OUT STD_LOGIC_VECTOR(3 DOWNTO 0);END SS;ARCHITECTURE fwm OF SS ISSIGNAL shn_temp : STD_LOGIC;SIGNAL h_hi_temp,h_lo_temp,m_hi_temp,m_lo_temp : STD_LOGIC_VECTOR(3 DOWNTO 0);BEGINPROCESS(

45、clk,clr,plus,trfo,h_lo,h_hi,m_lo,m_hi) BEGINif clr='1' thenif plus='0' or trf='0' then-當(dāng)plus或者trf為1時(shí)，說(shuō)明要加數(shù)或者移位，因此在變暗的時(shí)候要立即變成原來(lái)的樣子shn_temp<='0'h_hi_temp<=h_hi;h_lo_temp<=h_lo;m_hi_temp<=m_hi;m_lo_temp<=m_lo;elsif (clk'EVENT AND clk='1') then

46、-閃爍部分，每一個(gè)脈沖重新賦值四個(gè)輸出，當(dāng)shn_temp為0時(shí)，-通過(guò)trfo的位置時(shí)四個(gè)輸出中的一個(gè)變暗，即頁(yè)碼器變成全1-從而實(shí)現(xiàn)每一個(gè)秒單位閃暗交替h_hi_temp<=h_hi;h_lo_temp<=h_lo;m_hi_temp<=m_hi;m_lo_temp<=m_lo;if shn_temp='0' thenshn_temp<='1'else shn_temp<='0'end if;if shn_temp='0' thenif trfo="00" thenm_l

47、o_temp<="1111"elsif trfo="01" thenm_hi_temp<="1111"elsif trfo="10" thenh_lo_temp<="1111"elsif trfo="11" thenh_hi_temp<="1111"end if;end if;end if;elsif clr='0' thenh_hi_temp<=h_hi;h_lo_temp<=h_lo;m_hi_tem

48、p<=m_hi;m_lo_temp<=m_lo;end if;end process;oh_hi<=h_hi_temp;oh_lo<=h_lo_temp;om_hi<=m_hi_temp;om_lo<=m_lo_temp;end fwm;10 連接部分（實(shí)現(xiàn)與鈴聲連接）LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;ENTITY lj IS -時(shí)鐘與上下課鈴的部分PORT(clr:IN STD_LOGIC;h_lo,h_hi,m_lo,m_hi : IN STD_LOGIC_VECTOR(3 DOWNTO 0);temp1,

49、temp2:OUT STD_LOGIC);END lj;ARCHITECTURE fwm OF lj ISSIGNAL tmp1,tmp2 :STD_LOGIC;SIGNAL tmp_cnt : STD_LOGIC_VECTOR(15 DOWNTO 0);BEGINtmp_cnt<=h_hi & h_lo & m_hi & m_lo;PROCESS(clr,h_lo,h_hi,m_lo,m_hi,tmp1,tmp2)beginif clr='0' then-當(dāng)一定時(shí)間時(shí)，通過(guò)輸出tmp1，tmp2，再通過(guò)四個(gè)jk觸發(fā)器來(lái)實(shí)現(xiàn)上下課鈴的分辨if tm

50、p_cnt="00000" OR tmp_cnt="10000" or tmp_cnt="10000" or tmp_cnt="00000" or tmp_cnt="10000" or tmp_cnt="10101" or tmp_cnt="00101" or tmp_cnt="10101" or tmp_cnt="10101" or tmp_cnt="00101" or tmp_cnt=&quo

51、t;10000" or tmp_cnt="00000" or tmp_cnt="10000" then tmp1<='1'tmp2<='0'elsif tmp_cnt="00101" OR tmp_cnt="10101" or tmp_cnt="10101" or tmp_cnt="00101" or tmp_cnt="10101" or tmp_cnt="00000" or tmp

52、_cnt="10000" or tmp_cnt="00000" or tmp_cnt="00000" or tmp_cnt="10000" or tmp_cnt="10101" or tmp_cnt="00101" or tmp_cnt="10101" then tmp1<='0'tmp2<='1'else tmp1<='0'tmp2<='0'end if;elsetm

53、p1<='0'tmp2<='0'end if;END PROCESS; temp1<=tmp1;temp2<=tmp2;END fwm;11譯碼器LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;ENTITY ymq01 ISPORT(data_in:IN STD_LOGIC_VECTOR(3 DOWNTO 0);dis_out:OUT STD_LOGIC_VECTOR(6 DOWNTO 0);END ymq01;ARCHITECTURE fwm OF ymq01 ISBEGINPROCESS(data_i

54、n) BEGINCASE data_in ISWHEN "0000" => dis_out<="1000000"-顯示0WHEN "0001" => dis_out<="1111001"-顯示1WHEN "0010" => dis_out<="0100100"-顯示2WHEN "0011" => dis_out<="0110000"-顯示3WHEN "0100" => dis_out<="0011001"-顯示4WHEN "0101" => dis_out<="0010010"-顯示5WHEN "0110" => dis_out<="0000010"-顯示6WHEN "0111" => dis_out<="1111000"-顯示7WHEN "1000" => dis_out<=&qu