使用特殊功能口開發(fā)IIC的軟件開發(fā)筆記

1、application note rej05b0365-0100z/rev.1.00 december 2003 page 1 of 28 r8c/10 group a software control of i2c-bus using general-purpose ports 1. abstract this application note describes a software control program of i2c-bus and its application example. this program can be also used for a control of e

2、eprom. 2. introduction a single master i2c-bus can be controlled by software using general-purpose ports. the external pull-up resistances should be attached top12(sda) and p13(scl). table 1 shows the functional performance of i2c-bus interface. table 1 functional performance of single master i2c-bu

3、s interface item functional performance communication mode master transmission (single master) scl clock frequency 100khz approx. note 1 this is a value for a cpu clock operated at 16mhz when no interrupt is used. when a cpu clock operates at other than 16mhz, some adjustment is necessary to set thi

4、s value. this program can also be used when operating other microcomputers within the m16c family, provided they have the same sfr (special function registers) as the r8c/10 microcomputers. however, some functions may have been modified. refer to the users manual for details. use functions covered i

5、n this application note only after careful evaluation. r8c/10 groupa software control of i2c-bus using general-purpose portsrej05b0365-0100z/rev.1.00 december 2003 page 2 of 28 3. i2c-bus 3.1 start condition / stop condition (1) start condition change sda from high to low when scl is high. later, ch

6、ange scl to low. (2) stop condition change sda from low to high when scl is high. later, change scl to low. figure 1 shows a configuration of start condition generation timing, and figure 2 shows a configuration of stop condition generation timing. a list of start condition / stop condition generati

7、on timing is shown in table 2 below. table2 a list of start condition / stop condition generation timing timing start condition stop condition set up time 2.0 s approx. 1.6 s approx. hold time 3.0 s approx. 3.0 s approx. note 1 this is a value for a cpu clock operated at 16mhz when interrupt is not

8、used when a cpu clock operates at other than 16mhz, some adjustment is necessary to set this value. figure 1 start condition generation timing sclsdaset up time hold time figure 2 stop condition generation timing sclsdaset up time hold time r8c/10 groupa software control of i2c-bus using general-pur

9、pose portsrej05b0365-0100z/rev.1.00 december 2003 page 3 of 28 3.2 data input / output (1) data output data is output to sda pin. after data setup time passes, a clock is output from scl pin. (”l”h”l”) (2) data input input data after driving scl high, and then drive scl low. figure 3 shows a configu

10、ration of data input/output timing , and table 3 shows a list of data input/output timing. table 3 a list of data input / output timing timing data output data input setup time 3.3 s approx. - access time - over 1 s approx. clock ”h” time 3.0 s approx. 4.7s approx. note 1 this is a value for a cpu c

11、lock operated at 16mhz when interrupt is not used when a cpu clock operates at other than 16mhz, some adjustment is necessary to set this value. figure 3 a configuration of data input /output timing setup time access timesclsdadata output data inputoutput inputclock ”h”time clock ”h” time r8c/10 gro

12、upa software control of i2c-bus using general-purpose portsrej05b0365-0100z/rev.1.00 december 2003 page 4 of 28 3.3 byte format 1 byte consists of 8-bit-length data and 1-bit-length acknowledge. acknowledge is a signal to indicate whether data is normally transferred or not. when acknowledge indicat

13、es “l(fā)”, data is normally transferred. when it is “h”, data is not normally transferred. when the master device transfers the data to the slave device, the master device releases sda line (high-impedance) at the 9th transmit clock pulse and the slave device returns an acknowledge signal. when the mas

14、ter device receives the data from the slave device, the slave device releases sda line (high-impedance) at the 9th transmit clock pulse and the master device returns an acknowledge signal. figure 4 shows a configuration of byte format. figure 4 byte format acknowledge d7 sclsdad6 d5 d4 d3 d2 d1 d0 a

15、ck data 1 2 3 45678 9 r8c/10 groupa software control of i2c-bus using general-purpose portsrej05b0365-0100z/rev.1.00 december 2003 page 5 of 28 4. application example(a control of eeprom) write / read the data to 2k-bit eeprom(hn58x2402si). in 7 bit addressing mode, device address code (a2,a1,a0)can

16、 be assigned by the lower 3 bit of device address word. figure 5 shows an example of connection between a microcomputer and eeprom(hn58x2402si). 4.1 byte write write “write data” to an address (n) assigned to memory address(w7 to w0). confirm acknowledge and generate stop condition after 8-bit write

17、 data is output. r8c/10 group p12p13sdascla2a1a0wp“l(fā)”hn58x2402sifigure 5 an example of connection figure 6 byte write s s: start condition p: stop condition from master device to slave device a: acknowledge r/w: read / write bit from slave device to master devicedevice address (10100002) r/w (02) 7

18、bit a memory address(n)(w7 to w0) 8 bit awrite data(n) (d7 to d0) 8 bit a p r8c/10 groupa software control of i2c-bus using general-purpose portsrej05b0365-0100z/rev.1.00 december 2003 page 6 of 28 4.2 page write write multi-bytes (m+1) of “write data” to address assigned to memory address(w7 to w0)

19、.* confirm acknowledge and generate stop condition after the assigned byte of “write data” is output. *page write provides a sequential write of up to 8 byte-data. refer to eeprom(hn58x2402si) datasheet for details. 4.3 sequential read read “read data ” from an address (n) assigned to memory address

20、(w7 to w0). output acknowledge “0” to read multi-byte (m+1) of read data after read data is input.output acknowledge “1” and generate stop condition after the assigned byte of read data is input. figure 7 page write s device address (10100002) 7 bit a memory address(n)(w7 to w0) 8 bit awrite data (n

21、) (d7 to d0) 8 bit pr/w (02) s: start condition p: stop condition from master device to slave device a: acknowledge r/w: read / write bit from slave device to master devicea a ? ? ? write data (n+m) (d7 to d0) 8 bit ? ? ?figure 8 sequential read cycle s device address (10100002) 7 bit a memory addre

22、ss(n)(w7 to w0) 8 bit apr/w (02) s: start condition p: stop condition from master device to slave device a: acknowledge r/w: read / write bit from slave device to master device sr: restart condition a aread data (n) (d7 to d0) 8 bit read data (n+m) (d7 to d0) 8 bit ? ? ? device address (10100002) 7

23、bit a r/w (12) srr8c/10 groupa software control of i2c-bus using general-purpose portsrej05b0365-0100z/rev.1.00 december 2003 page 7 of 28 5. flowchart 5.1 initial operation and main loop main yesnosfr initialization (i2c-bus) initiicbusi=1 writedata0 = 0 xff; iicdata_w.iic_deviceaddress = 0 xa0;iic

24、data_w.iic_wordaddress = 0 x10; iicdata_w.iic_data = writedata; iicdata_w.iic_numberofbyte = 1; i2c-bus write iicbuswriteyes noi=0 yesnoi=2 yesnoi=3 yesnoi=4 for (i=0; iiic_deviceaddress &= 0 xfe; ; write setting device address return(ret) start condition startcondition; start condition devicead

25、dress write bytewriteyesnodetect noack ; write device address memoryaddress write bytewriteyesnodetect noack ; write memory address iicdata-iic_deviceaddress |= 0 x01; ; read setting device address start condition startcondition; restart condition deviceaddress write bytewriteyesnodetect noack ; wri

26、te device address read(ack output) byteread; read data (ack output) read(noack output) byteread; read data (noack output) repeat i=0; iiic_data+; r8c/10 groupa software control of i2c-bus using general-purpose portsrej05b0365-0100z/rev.1.00 december 2003 page 10 of 28 5.4 i2c-bus write iicbuswrite i

27、icdata-iic_deviceaddress &= 0 xfe; ; write setting device address return(ret) start condition startcondition; start condition deviceaddress write bytewriteyesnodetect noack ; write device address memoryaddress write bytewriteyesnodetect noack ; write memory address yesnodetect noack write data b

28、ytewrite; write data repeat i=0; iiic_data+; r8c/10 groupa software control of i2c-bus using general-purpose portsrej05b0365-0100z/rev.1.00 december 2003 page 11 of 28 5.5 i2c-bus start condition startcondition iic_scl = 0; iic_scl_d = 1; ; scl= l ; scl output ; sda= h return wait _waittime1usiic_sc

29、l = 1; ; scl= h wait _wait_tsu_staiic_sda = 0; iic_sda_d = 1; wait _wait_thd_staiic_scl = 0; ; scl= l ; sda= l ; sda output wait _waittime1usiic_sda_d = 0; wait _waittime1uswait _waittime1usr8c/10 groupa software control of i2c-bus using general-purpose portsrej05b0365-0100z/rev.1.00 december 2003 p

30、age 12 of 28 5.6 i2c-bus stop condition stopcondition iic_scl = 0; iic_scl_d = 1; ; scl= l ; scl output ; sda= l ; sda output return wait _waittime1usiic_scl = 1; ; scl= h wait _wait_tsu_sto iic_sda_d = 0; wait _waittime1usiic_scl = 0; ; scl= l ; sda= h iic_sda = 0; iic_sda_d = 1; wait _waittime1usw

31、ait _waittime1usr8c/10 groupa software control of i2c-bus using general-purpose portsrej05b0365-0100z/rev.1.00 december 2003 page 13 of 28 5.7 i2c-bus byte write bytewrite return(ret) wait _wait_tsu_dat/_waittime1usiic_scl = 1; ; scl= h wait _wait_thigh/_waittime1us iic_scl = 0; wait _wait_taa/_wait

32、time2usiic_scl = 1; ; scl= h ; scl= l yesnoloop 8 times iic_sda = 0; noyesiic_writedata & maskdata iic_sda_d = 0; ; initialize port-latch iic_sda_d = 1; nop x 3 ; sda= l ; sda= h maskdata = 1; ; change mask data iic_sda_d = 0; ; sda input noyesiic_sda=”h” ret=noack; ; noack detect wait _wait_thi

33、gh/_waittime1us iic_scl = 0; ; scl= l wait _wait_thd_dat maskdata=0 x80; ret=ack; ; initialize auto variable wait _waittime1us r8c/10 groupa software control of i2c-bus using general-purpose portsrej05b0365-0100z/rev.1.00 december 2003 page 14 of 28 5.8 i2c-bus byte read byteread return iic_scl = 1;

34、 ; scl= h wait _wait_thigh/_waittime1us iic_scl = 0; wait _wait_tsu_dat/_waittime1usiic_scl = 1; ; scl= h ; scl= l yesnoloop 8 times iic_sda = 0; noyesiic_sda=”h” *iic_readdata = readdata; ; initialize port-latch maskdata = 1; ; change mask data iic_sda = ack; iic_sda_d = 1; ; sda= l ; sda output wa

35、it _wait_thigh/_waittime1us iic_scl = 0; iic_sda_d = 0; ; scl= l ; sda input maskdata=0 x80; ; initialize auto variable wait _wait_taareaddata = *iic_readdata | maskdata; nop x 13 wait _waittime1us noyesack iic_sda = noack; iic_sda_d = 0; ; sda= h ; sda input wait _waittime1us r8c/10 groupa software

36、 control of i2c-bus using general-purpose portsrej05b0365-0100z/rev.1.00 december 2003 page 15 of 28 6. program /* * * * file name : main.c * * contents : main file * * copyright : renesas technology corporation * * and renesas solutions corporation * * version : 1.0 * * note : * * * */ #include sfr

37、r8c10.h #include iic_bus.h void main (void) static unsigned char i=0; static unsigned char writedata8; static unsigned char readdata8; iicpack iicdata_w; iicpack iicdata_r; p1_4 = 1; /* test port */ pd1_4 = 1; /* test port */ p1_1 = 1; /* test port */ pd1_1 = 1; /* test port */ while(1) while(i=0) i

38、 = mode(); /* setting access mode */ p1_4 = 1; switch (i) case 1: /* write data 1byte */ writedata0 = 0 xaa; /* setting write data */ iicdata_w.iic_deviceaddress = 0 xa0; iicdata_w.iic_memoryaddress = 0 x10; iicdata_w.iic_data = writedata; iicdata_w.iic_numberofbyte = 1; p1_4 = 0; if (iicbuswrite(&a

39、mp;iicdata_w) = ack) p1_4 = 1; ; break; case 3: /* write data 8bytes */ for (i=0; i 4) mode=0; /* change mode */ return(mode); r8c/10 groupa software control of i2c-bus using general-purpose portsrej05b0365-0100z/rev.1.00 december 2003 page 17 of 28 /* * * * file name : iic_bus.h * * contents : iic

40、bus definition file * * copyright : renesas technology corporation * * and renesas solutions corporation * * version : 1.0 * * note : * * * */ #define ack 0 #define noack 1 #define write_mode 0 #define read_mode 1 typedef unsigned char uchar; typedef struct unsigned char iic_deviceaddress; unsigned

41、char iic_memoryaddress; unsigned char *iic_data; unsigned char iic_numberofbyte; iicpack; void initiicbus(void); unsigned char iicbusread(iicpack *); unsigned char iicbuswrite(iicpack *); void startcondition(void); void stopcondition(void); unsigned char bytewrite(unsigned char); void byteread (unsi

42、gned char *, unsigned char); r8c/10 groupa software control of i2c-bus using general-purpose portsrej05b0365-0100z/rev.1.00 december 2003 page 18 of 28 /* * * * file name : iic_bus.c * * contents : iic bus file * * copyright : renesas technology corporation * * and renesas solutions corporation * *

43、version : 1.0 * * note : * * * */ #include sfrr8c10.h #include iic_bus.h #define iic_sda_d pd1_2 #define iic_sda p1_2 #define iic_scl_d pd1_3 #define iic_scl p1_3 void _waittime0us(void); void _waittime1us(void); void _waittime2us(void); #define _wait_thigh _waittime1us() /* clock pulse width high *

44、/ #define _wait_tlow _waittime2us() /* clock pulse width low */ #define _wait_thd_sta _waittime1us() /* start hold time */ #define _wait_tsu_sta _waittime1us() /* start setup time */ #define _wait_thd_dat _waittime0us() /* data in hold time */ #define _wait_tsu_dat _waittime1us() /* data in setup ti

45、me */ #define _wait_taa _waittime1us() /* access time */ #define _wait_tsu_sto _waittime1us() /* stop setup time */ #define _wait_tbuf _waittime2us() /* bus free time for next mode */ /* name : initiicbus parameters : none returns : none description : initialize i2c-bus port */ void initiicbus(void)

46、 iic_sda_d = 0; /* sda input (h state) */ iic_scl_d = 0; /* scl input (h state) */ r8c/10 groupa software control of i2c-bus using general-purpose portsrej05b0365-0100z/rev.1.00 december 2003 page 19 of 28 /* name : iicbusread parameters : structure iicpack pointer returns : acknowledge description

47、: sequential ramdom read cycle (i2c-bus) */ unsigned char iicbusread(iicpack *iicdata) unsigned char i,ret; /* ramdom read cycle / sequential ramdom read cycle */ iicdata-iic_deviceaddress &= 0 xfe; /* write setting deviceaddress */ startcondition(); /* start condition */ while (1) if (ret= byte

48、write(iicdata-iic_deviceaddress) = noack) /* write deviceaddress */ break; /* noack detect */ if (ret= bytewrite(iicdata-iic_memoryaddress) = noack) /* write memoryaddress */ break; /* noack detect */ iicdata-iic_deviceaddress |= 0 x01; /* read setting deviceaddress */ startcondition(); /* restart c

49、ondition */ if (ret= bytewrite(iicdata-iic_deviceaddress) = noack) /* deviceaddress write */ break; /* noack detect */ for (i=1; iiic_numberofbyte; i+) /* specified bytes as loop */ byteread (iicdata-iic_data, ack); /* read data (ack output) */ iicdata-iic_data+; /* */ byteread (iicdata-iic_data, no

50、ack); /* read data (noack output) */ break; stopcondition(); /* stop condition */ return(ret); r8c/10 groupa software control of i2c-bus using general-purpose portsrej05b0365-0100z/rev.1.00 december 2003 page 20 of 28 /* name : iicbuswrite parameters : structure iicpack pointer returns : acknowledge

51、 description : byte write or page write cycle (i2c-bus) */ unsigned char iicbuswrite(iicpack *iicdata) unsigned char i,ret; /* byte write / page write */ iicdata-iic_deviceaddress &= 0 xfe; /* write setting deviceaddress */ startcondition(); /* start condition */ while (1) if (ret= bytewrite(iic

52、data-iic_deviceaddress) = noack) /* write deviceaddress */ break; /* noack detect */ if (ret= bytewrite(iicdata-iic_memoryaddress) = noack) /* write memoryaddress */ break; /* noack detect */ for (i=0; iiic_numberofbyte; i+) /* specified bytes as loop */ if (ret= bytewrite(*(iicdata-iic_data) = noac

53、k) /* write data */ break; /* noack detect */ iicdata-iic_data+; /* */ break; stopcondition(); /* stop condition */ return(ret); r8c/10 groupa software control of i2c-bus using general-purpose portsrej05b0365-0100z/rev.1.00 december 2003 page 21 of 28 /* name : startcondition parameters : none retur

54、ns : none description : output start condition (i2c-bus) note : *1 adjust a wait time */ void startcondition(void) iic_scl = 0; /* scl= l */ iic_scl_d = 1; /* scl output */ _waittime1us(); /* wait *1 */ iic_sda_d = 0; /* sda=h */ _waittime1us(); /* wait */ _waittime1us(); /* wait *! */ iic_scl = 1;

55、/* scl= h */ _wait_tsu_sta; /* wait */ iic_sda = 0; /* sda=l */ iic_sda_d = 1; /* sda output */ _wait_thd_sta; /* wait */ _waittime1us(); /* wait *1 */ iic_scl = 0; /* scl= l */ /* name : stopcondition parameters : none returns : none description : output stop condition (i2c-bus) note : *1 adjust a

56、wait time */ void stopcondition(void) iic_scl = 0; /* scl= l */ iic_scl_d = 1; /* scl output */ _waittime1us(); /* wait *1 */ iic_sda = 0; /* sda=l */ iic_sda_d = 1; /* sda output */ _waittime1us(); /* wait *1 */ iic_scl = 1; /* scl= h */ _wait_tsu_sto; /* wait */ iic_sda_d = 0; /* sda=h */ _waittim

57、e1us(); /* wait */ _waittime1us(); /* wait *1 */ iic_scl = 0; /* scl= l */ r8c/10 groupa software control of i2c-bus using general-purpose portsrej05b0365-0100z/rev.1.00 december 2003 page 22 of 28 /* name : bytewrite parameters : write data returns : acknowledge description : byte data output (i2c-

58、bus) note : *1 adjust a wait time */ unsigned char bytewrite(unsigned char iic_writedata) unsigned char maskdata=0 x80; /* msb first */ unsigned char ret= ack; /* ack/noack */ while (maskdata) /* 8times as loop */ iic_sda = 0; /* initialize port-latch */ if (iic_writedata & maskdata) /* h output

59、 ? */ iic_sda_d = 0; /* yes sda=h */ else iic_sda_d = 1; /* no sda=l */ asm(nop); /* wait *1 */ asm(nop); /* wait *1 */ asm(nop); /* wait *1 */ _wait_tsu_dat; /* wait */ _waittime1us(); /* wait *1 */ iic_scl = 1; /* scl=h */ _wait_thigh; /* wait */ _waittime1us(); /* wait *1 */ iic_scl = 0; /* scl=l

60、 */ maskdata = 1; /* change mask data */ _waittime1us(); /* wait *1 */ iic_sda_d = 0; /* sda input */ _wait_taa; /* wait */ _waittime2us(); /* wait *1 */ iic_scl = 1; /* scl= h */ if (iic_sda) ret=noack; /* noack detect */ _wait_thigh; /* wait */ _waittime1us(); /* wait *1 */ iic_scl = 0; /* scl= l */ _wait_thd_dat; /* wait