用Verilog做的SD卡控制器有詳細的注釋

1、用Verilog 做的SD卡控制器-SD 卡-II 2011-12-02 15:53/SD命令CMDS送控制/1.發(fā)送8個時鐘脈沖/ 2. SD 卡片選CSS低，即片選有效/ 3. 連續(xù)發(fā)送6個字節(jié)命令/ 4. 接收1個字節(jié)響應數(shù)據(jù)/ 5. SD 卡片選CS拉高，即關閉SDK/*發(fā)送總共6個字節(jié)命令格式：0 - start bit1 - hostbit5-0 - commandbit31-0 - argumentbit6-0 - CRC71 - end bit*/發(fā)送sd命令狀態(tài)機控制reg5:0 cmd;/發(fā)送命令寄存器reg31:0 arg;/發(fā)送參數(shù)寄存器reg7:0 crc;/ 發(fā)送

2、CRCK驗碼reg spi_cs_nr;/SPI 從設備使能信號，由主設備控制reg spi_tx_enr;/SPI 數(shù)據(jù)發(fā)送使能信號，高有效reg spi_rx_enr;/SPI 數(shù)據(jù)接收使能信號，高有效reg7:0 spi_tx_dbr;/SPI 數(shù)據(jù)發(fā)送寄存器reg7:0 spi_rx_dbr;/SPI 數(shù)據(jù)接收寄存器reg3:0 nclk_cnt;/74+CLK發(fā)送周期計數(shù)器reg7:0 wait_cnt8;/命令操作間隔等待計數(shù)器reg9:0 cnt512;/ 讀取 512B 計數(shù)器reg7:0 retry_rep;/重復讀取 respone 計數(shù)器reg7:0 retry_cmd;

3、/重復當前命令計數(shù)器assign spi_cs_n = spi_cs_nr;assign spi_tx_en = spi_tx_enr;assign spi_rx_en = spi_rx_enr;assign spi_tx_db = spi_tx_dbr;assign sd_dout = spi_rx_dbr;/每接收一個字節(jié)數(shù)據(jù)，該位置高一個時鐘周期，共 512Bassign sd_fifowr = (spi_rx_rdy & spi_rx_enr & (cmd_cstate = CMD_RD) & (cnt512 < 10'd513);wire cmd

4、_clk = (sdinit_cstate = SDINIT_CLK);/ 進入上電初始化時的 74+CLK 產(chǎn)生狀態(tài)標志位wire cmd_en = (sdinit_cstate = SDINIT_CMD0) | (sdinit_cstate = SDINIT_CMD55) | (sdinit_cstate = SDINIT_ACMD41)/(sdinit_cstate = SDINIT_CMD1)| (sdinit_cstate = SDINIT_CMD16);/命令發(fā)送使能標志位，高有效wire cmd_rdboot_en = (sdinit_cstate = SD_RD_BPB) |

5、(sdinit_cstate =SD_RD_PT);/讀愈SD啟動if血能信號，高"效wire cmd_rdy = (cmd_nstate = CMD_CLKE) & spi_tx_rdy & spi_tx_enr);/命令發(fā)送完成標志位，高有效reg3:0 cmd_cstate;/發(fā)送命令當前狀態(tài)寄存器reg3:0 cmd_nstate;/發(fā)送命令下一狀態(tài)寄存器parameterCMD_IDLE= 4'd0,/無命令發(fā)送，等待狀態(tài)CMD_NCLK= 4'd1,/上電初始化時需要產(chǎn)生74+CLK犬態(tài)CMD_CLKS= 4'd2,/產(chǎn)生 8 個

6、CLK狀態(tài)CMD_STAR= 4'd3,/發(fā)送起始字節(jié)狀態(tài)CMD_ARG1= 4'd4,/發(fā)送 arg31:24狀態(tài)CMD_ARG2= 4'd5,/發(fā)送 arg23:16狀態(tài)CMD_ARG3= 4'd6,/發(fā)送 arg15:8狀態(tài)CMD_ARG4= 4'd7,/發(fā)送 arg7:0狀態(tài)CMD_END= 4'd8,/發(fā)送結束字節(jié)狀態(tài)CMD_RES= 4'd9,/接收口向應字節(jié)CMD_CLKE= 4'd10,/產(chǎn)生 8 個 CLK狀態(tài)CMD_RD= 4'd11,/讀 512Byte 狀態(tài)CMD_DELAY= 4'd12;

7、/讀寫操作完成延時等待狀態(tài)/狀態(tài)轉(zhuǎn)移always (posedge clk or negedge rst_n) if(!rst_n) cmd_cstate <= CMD_IDLE; else cmd_cstate <= cmd_nstate;/狀態(tài)控制always (cmd_cstate or wait_cnt8 or cmd_clk or cmd_en or spi_tx_rdy or spi_rx_rdy or nclk_cnt or retry_repor sdinit_cstate or spi_tx_enr or spi_rx_enr or cmd_rdboot_en o

8、r cnt512or spi_rx_dbr) begincase(cmd_cstate)CMD_IDLE: beginif(wait_cnt8 = 8'hff)if(cmd_clk) cmd_nstate <= CMD_NCLK;else if(cmd_en | cmd_rdboot_en) cmd_nstate <= CMD_STAR;else cmd_nstate <= CMD_IDLE;else cmd_nstate <= CMD_IDLE;endCMD_NCLK: beginif(spi_tx_rdy && (nclk_cnt = 4&#

9、39;d11) && (!spi_tx_enr & !spi_rx_enr) cmd_nstate <= CMD_CLKE;else cmd_nstate <= CMD_NCLK;endCMD_CLKS: beginif(spi_tx_rdy && (!spi_tx_enr & !spi_rx_enr) cmd_nstate <= CMD_STAR;else cmd_nstate <= CMD_CLKS;endCMD_STAR: begin if(spi_tx_rdy && (!spi_tx_enr &am

10、p; !spi_rx_enr) cmd_nstate <= CMD_ARG1;else cmd_nstate <= CMD_STAR;endCMD_ARG1: beginif(spi_tx_rdy && (!spi_tx_enr & !spi_rx_enr) cmd_nstate <= CMD_ARG2;else cmd_nstate <= CMD_ARG1;endCMD_ARG2: beginif(spi_tx_rdy && (!spi_tx_enr & !spi_rx_enr) cmd_nstate <= CMD

11、_ARG3;else cmd_nstate <= CMD_ARG2;endCMD_ARG3: beginif(spi_tx_rdy && (!spi_tx_enr & !spi_rx_enr) cmd_nstate <= CMD_ARG4;else cmd_nstate <= CMD_ARG3;endCMD_ARG4: beginif(spi_tx_rdy && (!spi_tx_enr & !spi_rx_enr) cmd_nstate <= CMD_END;else cmd_nstate <= CMD_ARG4;

12、endCMD_END: beginif(spi_tx_rdy && (!spi_tx_enr & !spi_rx_enr) cmd_nstate <= CMD_RES;else cmd_nstate <= CMD_END;endCMD_RES: beginif(retry_rep = 8'hff) cmd_nstate <= CMD_IDLE;/響應超時，返回 IDLE 重新發(fā)起命令if(spi_rx_rdy && (!spi_tx_enr & !spi_rx_enr) begincase(sdinit_cstate)S

13、D_RD_PT,SD_RD_BPB:if(spi_rx_dbr = 8'hfe) cmd_nstate <= CMD_RD;/ 接收到 RD命令的起始字節(jié) 8'hfe,立即讀取后面的512Belse cmd_nstate <= CMD_RES;SDINIT_CMD0,SDINIT_CMD55,SDINIT_ACMD41,SDINIT_CMD16:if(spi_rx_dbr = 8'hff) cmd_nstate <= CMD_RES;else cmd_nstate <= CMD_CLKE;/產(chǎn)生正確響應，結束當前命令default: cmd_nstate <= CMD_CLKE;endcaseendelse cmd_nstate <= CMD_RES;endCMD_CLKE: beginif(spi_tx_rdy && (!spi_tx_enr & !spi_rx_enr) cmd_nstate <= CMD_IDLE;else