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AnalyzethepowerregulatorcircuitforVcore&3.3V/5VPresentbyLukeXu2003/11/271第一頁,共三十頁。AnalyzethepowerregulatorcircuitforVcore&3.3V/5VbaseonKT9

TheContents1.TypicalNotebookPowerSupplyDiagram2.Analyzethe3.3V&5Vregulatorcircuit3.AnalyzetheCPUVcoreregulatorcircuit4.Conclusions5.Q&A2第二頁,共三十頁。1.TypicalNotebookPowerSupplyDiagram

1.1BlockDiagramofNotebookPowerSupply

1.2NS87570PowerSequence3第三頁,共三十頁。1.1BlockDiagramofNotebookPowerSupply3V_MODEMMAX163212V12VS5VSUS5V3VSUS3VMAINONSUSONSUSDMAINDSUSDMAINDS5_MODENENSC1470SC1480HIP63012_5VSUSVTT_DDRVHCORESMARTCHARGERRUN/ON3ADAPTERTIME/ON5SUSONMAINONCORE_ENVHVHPWR_SRCVID(0…4)4第四頁,共三十頁。NS87570MS1535+DCtoDCBuckConverterLogic&Delaycircuit-DNBSWON-NBSWON-SUSB-SUSCSUSONMAINONVRONHWPG_POWERNPWROKNB_PWROKSB_PWROKCPU_PWRGD(1)RVCC(2)(3)(4)(5)(6)(7)PWRBUTTON

1.2NS87570PowerSequence5第五頁,共三十頁。2.Analyzethe3.3V&5Vregulatorcircuit2.1SomeBasicsonSynchronousBuckConverter2.2IntroducetypicalcontrolICspecificationofMAX1632Controller2.3Analyzethe3.3V&5VregulatorSchematics6第六頁,共三十頁。2.1SomeBasicsonSynchronousBuckConverterCoVinL1M1VoM2CinGNDBasicOperation:TopswitchM1“on”andbottomswitchM2“off” Vin-VoacrossL1andcurrentflowsinM1,L1,andintotheloadwithpositiveslope.TopswitchM1“off”andbottomswitchM2“on”

VovoltageacrossL1(reverse)andcurrentflowsinL1andintotheloadwithnegativeslope.Firstorderinput-outputvoltagerelation:7第七頁,共三十頁。

2.1SomeBasicsonSynchronousBuckConverter(Cont.)t1t4TopGateDriveBottomGateDriveTopSwitchCurrentBottomSwitchCurrentBottomDiodeCurrentBottomChannelCurrentSwitchNodeVoltageInductorCurrentt0t2t3t5t7t6t8t9ttCoVinL1M1VoM2CinGNDSN8第八頁,共三十頁。2.2IntroducetypicalcontrolICspecificationofMAX1632ControllerThefeaturesofcontrollerMax1632:96%Efficiency+4.2Vto+30VInputRangeSelectable3.3V&5VFixedorAdjustableOutputs(DualMode)12VLinearRegulator5V/50mALinearRegulatorOutputPrecision2.5VReferenceOutputProgrammablePower-UpSequencingPower-Good(RESET)Output

OutputOvervoltageProtectionOutputUndervoltageShutdown200kHz/300kHzLow-Noise,Fixed-FrequencyOperationLow-Dropout,99%Duty-FactorOperation2.5mWTypicalQuiescentPower(+12Vinput,bothSMPSson)4μATypicalShutdownCurrent9第九頁,共三十頁。2.2IntroducetypicalcontrolICspecificationofMAX1632Controller(Cont.)MAX1632BlockDiagram10第十頁,共三十頁。2.2IntroducetypicalcontrolICspecificationofMAX1632Controller(Cont.)PinDescriptionPINNAMEFUNCTION1CSH3Current-SenseInputforthe3.3VSMPS.Current-limitlevelis100mVreferredtoCSL3.2CSL3Current-SenseInput.Alsoservesasthefeedbackinputinfixed-outputmode.3FB3FeedbackInputforthe3.3VSMPS;regulatesatFB3=REF(approx.2.5V)inadjustablemode.FB3isaDualModeinputthatalsoselectsthe3.3VfixedoutputvoltagesettingwhentiedtoGND.ConnectFB3toaresistordividerforadjustable-outputmode.412OUT12V/120mALinearRegulatorOutput.InputsupplycomesfromVDD.Bypass12OUTtoGNDwith1μFminimum.5VDDSupplyVoltageInputforthe12OUTLinearRegulator.Alsoconnectstoaninternalresistordividerforsecondarywindingfeedback,andtoan18Vovervoltageshuntregulatorclamp.11第十一頁,共三十頁。2.2IntroducetypicalcontrolICspecificationofMAX1632Controller(Cont.)PinDescriptionPINNAMEFUNCTION6SYNCOscillatorSynchronizationandFrequencySelect.Tieto

VLfor

300kHzoperation;tietoGNDfor200kHz

operation.Canbedrivenat240kHzto350kHzforexternalsynchronization.7TIME/ON5Dual-PurposeTimingCapacitorPinandON/OFFControlInput.SeePower-UpSequencingand

ON/OFF

Controlssection.8GNDLow-NoiseAnalogGroundandFeedbackReferencePoint9REF2.5VReferenceVoltageOutput.BypasstoGNDwith1μF

min.10SKIPLogic-ControlInputthatdisablesIdleModewhenhigh.ConnecttoGNDfornormaluse.11RESETActive-LowTimedResetOutput.RESETswingsGNDtoVL.Goeshighafterafixed32,000clock-cycledelayfollowingpower-up.12FB5FeedbackInputforthe5VSMPS;regulatesatFB5=REF(approx.2.5V)inadjustablemode.FB5isaDualModeinputthatalsoselectsthe5VfixedoutputvoltagesettingwhentiedtoGND.ConnectFB5toaresistordividerforadjustable-outputmode.12第十二頁,共三十頁。2.2IntroducetypicalcontrolICspecificationofMAX1632Controller(Cont.)PinDescriptionPINNAMEFUNCTION13CSL5Current-SenseInputforthe5VSMPS.Alsoservesasthefeedbackinputinfixed-outputmode,andasthebootstrapsupplyinputwhenthevoltageonCSL5/VLis>4.5V.14CSH5Current-SenseInputforthe5VSMPS.Current-limitlevelis100mVreferredtoCSL5.15SEQPin-StrapInputthatselectstheSMPSpower-upsequence:SEQ=GND:5Vbefore3.3V,RESEToutputdeterminedbybothoutputs;SEQ=REF:SeparateON3/ON5controls,RESEToutputdeterminedby3.3Voutput;SEQ=VL:3.3Vbefore5V,RESEToutputdeterminedbybothoutputs16DH5Gate-DriveOutputforthe5V,high-sideN-channelswitch.DH5isafloatingdriveroutputthatswings

fromLX5toBST5,ridingontheLX5switchingnodevoltage.17LX5SwitchingNode(inductor)Connection.Canswing2Vbelowgroundwithouthazard.18BST5Boostcapacitorconnectionforhigh-sidegatedrive(0.1μF)13第十三頁,共三十頁。2.2IntroducetypicalcontrolICspecificationofMAX1632Controller(Cont.)PinDescriptionPINNAMEFUNCTION19DL5Gate-DriveOutputforthelow-sidesynchronous-rectifierMOSFET.Swings0VtoVL.20PGNDPowerGround21VL5VInternalLinear-RegulatorOutput.VLisalsothesupplyvoltagerailforthechip.Afterthe5VSMPSoutputhasreached+4.5V(typical),VLautomaticallyswitchestotheoutputvoltageviaCSL5forbootstrapping.BypasstoGNDwith4.7μF.VLsuppliesupto25mAforexternalloads.22V+BatteryVoltageInput,+4.2Vto+30V.BypassV+toPGNDclose

totheICwitha0.22μFcapacitor.

ConnectstoalinearregulatorthatpowersVL.23/SHDNShutdownControlInput,activelow.Logicthresholdissetatapproximately1V.Forautomaticstart-up,

connectSHDNtoV+througha220k?resistorandbypassSHDNtoGNDwitha0.01μFcapacitor.24DL3Gate-DriveOutputforthelow-sidesynchronous-rectifierMOSFET.Swings0VtoVL.14第十四頁,共三十頁。2.2IntroducetypicalcontrolICspecificationofMAX1632Controller(Cont.)PinDescriptionPINNAMEFUNCTION25BST3BoostCapacitorConnectionforhigh-sidegatedrive(0.1μF)26LX3SwitchingNode(inductor)Connection.Canswing2Vbelowgroundwithouthazard.27DH3Gate-DriveOutputforthe3.3V,high-sideN-channelswitch.DH3isafloatingdriveroutputthatswings

fromLX3toBST3,ridingontheLX3switchingnodevoltage.28RUN/ON3ON/OFFControlInput.SeePower-UpSequencingandON/OFF

Controlssection.15第十五頁,共三十頁。2.3Analyzethe3.3V&5VregulatorSchematics16第十六頁,共三十頁。3.AnalyzetheCPUVcoreregulatorcircuit3.11-PhasevsMulti-Phase

3.2IntroducetheHIP6301controller3.3AnalyzetheCPUVcoreregulatorSchematics17第十七頁,共三十頁。3.11-PhasevsMulti-PhaseDesignTrade-off(1):1-PhasevsMulti-Phase?1-Phase:-Pro:Onlyoneinductor-Cons:?Lowefficiency?LargeinductormaynotfitintonotebookPC?HighswitchinglossesandpossibledV/dtrelatedcatastrophicfailure.?Highinputripplecurrent.?CurrentcrowdingonthePCBintroduces“hotspot”.?MoreEMI.18第十八頁,共三十頁。3.11-PhasevsMulti-Phase(Cont.)DesignTrade-off(2):1-PhasevsMulti-Phase?Multi-Phase:-Currentisdistributedevenlytoavoidhotspots.-Inputripplecurrentcancellationallowstheuseofsmallerinputcap-Outputripplecurrentcancellationallowstheuseofsmalleroutputinductance?Smallersize?Fasterloadtransientresponses-Highefficiencyathighcurrentapplications-Fasttransientresponses-LessEMI19第十九頁,共三十頁。3.11-PhasevsMulti-Phase(Cont.)InputRippleCurrentCancellationTwoparalleledBucks?Multi-Phasetechniquereducestheinputripplecurrentintotheinputcap20第二十頁,共三十頁。3.11-PhasevsMulti-Phase(Cont.)OutputRippleCurrentCancellationTwoparalleledBucks?Multi-PhasetechniquereducestheoutputripplecurrentwithoutusinglargerinductororhigherswitchingFrequency.21第二十一頁,共三十頁。

3.2IntroducetheHIP6301controllerMulti-PhasePowerConversionPrecisionChannelCurrentSharing---LossLessCurrentSampling-UsesrDS(ON))PrecisionCOREVoltageRegulation---±1%SystemAccuracyOverTemperatureMicroprocessorVoltageIdentificationInput--5-BitVIDInput--1.100Vto1.850Vin25mVSteps--Programmable“Droop”Voltage

FastTransientRecoveryTimeOverCurrentProtectionAutomaticSelectionof2,3,or4PhaseOperationHighRippleFrequency,(ChannelFrequency)TimesHighRippleFrequency,(ChannelFrequency)TimesNumberchannels...100kHzto6MHzThefeaturesofcontrollerHIP630122第二十二頁,共三十頁。

3.2IntroducetheHIP6301controller(Cont.)23第二十三頁,共三十頁。3.2IntroducetheHIP6301controller(Cont.)PinDescriptionPINNAMEFUNCTION1,2,3,4,5VID(4..0)VoltageIdentificationinputsfrommicroprocessor.Thesepins

respondtoTTLand3.3Vlogicsignals.TheHIP6301decodes

VIDbitstoestablishtheoutputvoltage.6COMPOutputoftheinternalerroramplifier.Connectthispintothe

externalfeedbackandcompensationnetwork.7FBInvertinginputoftheinternalerroramplifier.8FS/DISChannelfrequency,FSW,selectanddisable.A

resistorfrom

thispintogroundsetstheswitchingfrequencyofthe

converter.Pullingthispintogrounddisablestheconverter

andthreestatesthePWMoutputs.9GNDBiasandreferenceground.AllsignalsarereferencedtothisPin.10VSENPowergoodmonitorinput.Connecttothemicroprocessor-COREvoltage.24第二十四頁,共三十頁。3.2IntroducetheHIP6301controller(Cont.)PinDescriptionPINNAMEFUNCTION11,14,15,18PWM(1..4)PWMoutputsforeachdrivenchannelinuse.ConnectthesepinstothePWMinputofadriver.For

systemswhichuse3channels,connectPWM4high.Two

channelsystemsconnectPWM3and

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