外文翻譯-STC89C52 數(shù)據(jù)手冊(cè)

附錄B：外文文獻(xiàn)及譯文STC89C52DateSheetDescriptionTheSTC89C52isalow-power，high-performanceCMOS8-bitmicrocontrollerwith8Kbytesofin-systemprogrammableFlashmemory.Thedeviceis manufacturedusingAtmel’shigh-densitynonvolatilememorytechnologyandiscompatiblewiththeindustry-standard80C51instructionsetandpinout.Theon-chipFlashallowsprogrammemorytobereprogrammedin-systemorbyaconventionalnonvolatilememory programmer. By combining a versatile 8-bit CPU with programmableFlashonamonolithicchip，theAtmelSTC89C52isapowerfulmicrocontrollerwhichprovidesahighly-flexibleandcost-effectivesolutiontomanyembeddedcontrolapplications.TheSTC89C52providesthefollowingstandardfeatures:8KbytesofFlash，256bytesofRAM，32I/Olines，Watchdogtimer，twodatapointers，three16-bittimer/counters，asix-vectortwo-levelinterruptarchitecture，afullduplexserialon-chiposcillator，andclockcircuitry.Inaddition，theSTC89C52isdesignedwithstaticlogicforoperationdowntozerofrequencyandsupportstwosoftwareselectablepowersavingmodes.TheIdleModestopstheCPUwhileallowingtheRAM，timer/counters，serialport，andinterruptsystemtocontinuefunctioning.ThePower-downmodesavestheRAMcontentsbutfreezestheoscillator，disablingallotherchipfunctionsuntilthenextinterruptorhardwarereset.VCCSupplyvoltage.GNDGround.Port0Port0isan8-bitopendrainbidirectionalI/Oport.Asanoutputport ，eachpincansinkeightTTLinputs.When1sarewrittentoport0pins ，thepinscanbeusedashighimpedanceinputs.Port0canalsobeconfiguredtobethemultiplexedloworderaddress/databusduringaccessestoexternalprogramanddatamemory.InthismodeP0hasinternalpullups.Port0alsoreceivesthecodebytesduringFlashprogrammingandoutputsthecodebytesduringprogramverification.Externalpullupsarerequiredduringprogramverification.Port1Port1isan8-bitbidirectionalI/Oportwithinternalpullups.ThePort1outputbufferscansink/sourcefourTTLinputs.When1sarewrittentoPort1pins，theyarehighbytheinternalpullupsandcanbeusedasinputs.Asinputs，Port1pinsthatexternallybeingpulledlowwillsourcecurrent(IIL)becauseoftheinternalpullups.Inaddition，P1.0andP1.1canbeconfiguredtobethetimer/counter2externalinput(P1.0/T2)andthetimer/counter2triggerinput(P1.1/T2EX)，Port1alsoreceivesthelow-orderaddressbytesduringFlashprogrammingandverificationPort2Port2isan8-bitbidirectionalI/Oportwithinternalpullups.ThePort2outputbufferscansink/sourcefourTTLinputs.When1sarewrittentoPort2pins，theyarepulledhighbytheinternalpullupsandcanbeusedasinputs.Port2emitsthehigh-orderaddressbyteduringfetchesfromexternalprogrammemoryandduringaccessestoexternaldatamemorythatuse16-bitaddresses(MOVX@DPTR).Inthisapplication，Port2usesstronginternalpull-upswhenemitting1s.Duringaccessestoexternaldatamemorythatuse8-bitaddresses(MOVX@RI)，Port2emitsthecontentsoftheP2SpecialFunctionRegister.Port2alsoreceivesthehigh-orderaddressbitsandsomecontrolsignalsduringFlashprogrammingandverification.Port3Port3isan8-bitbidirectionalI/Oportwithinternalpullups.ThePort3outputbufferscansink/sourcefourTTLinputs.When1sarewrittentoPort3pins，theyarehighbytheinternalpullupsandcanbeusedasinputs.Asinputs，Port3pinsthatexternallybeingpulledlowwillsource current(IIL)becauseofthepullups. Port3alsoservesthefunctionsofvariousspecialfeaturesoftheSTC89C52，asshowninthefollowingtable.Port3alsoreceivessomecontrolsignalsforFlashprogrammingandverification.RSTResetinput.Ahighonthispinfortwomachinecycleswhiletheoscillatorisrunningresetsthedevice.ThispindrivesHighfor96oscillatorperiodsaftertheWatchdogtimesout.TheDISRTObitinSFRAUXR(address8EH)canbeusedtodisablethisfeature.InthedefaultstateofbitDISRTO，theRESETHIGHoutfeatureisALE/PROGAddressLatchEnable(ALE)isanoutputpulseforlatchingthelowbyteoftheaddressduringaccessestoexternalmemory.Thispinisalsotheprogrampulseinput(PROG)duringFlashprogramming.Innormaloperation，ALEisemittedatconstantrateof1/6theoscillatorfrequencyandmaybeusedforexternaltimingorclockingpurposes.Ifdesired，ALEoperationcanbedisabledbysettingbit0ofSFRlocation8EH.Withthebitset，ALEisactiveonlyduringaMOVXorMOVCinstruction.Otherwise，thepinisweaklypulledhigh.SettingtheALE-disablebitnoeffectifthemicrocontrollerisinexternalexecutionmode.PSENProgramStoreEnable(PSEN)isthereadstrobetoexternalprogrammemory.WhentheSTC89C52isexecutingcodefromexternalprogrammemory，PSENisactivatedtwiceeachmachinecycle，exceptthattwoPSENactivationsareskippedduringaccesstoexternaldatamemory.EA/VPPExternalAccessEnable.EAmustbestrappedtoGNDinordertoenablethedevicetofetchcodefromexternalprogrammemorylocationsstartingat0000HuptoFFFFH.Note，however，thatiflockbit1isprogrammed，EAwillbeinternallylatchedreset.EAshouldbestrappedtoVCCforinternalprogramexecutions.Thispinalsoreceivesthe12-voltprogrammingenablevoltage(VPP)duringFlashprogramming.XTAL1Inputtotheinvertingoscillatoramplifierandinputtotheinternalclockoperatingcircuit.XTAL2Outputfromtheinvertingoscillatoramplifier.譯文：STC89C52數(shù)據(jù)手冊(cè)功能特性描述STC89C52是一種低功耗、高性能CMOS88K在系統(tǒng)可Flash80C51產(chǎn)品指令和引腳完全兼容。片上Flash8CPUSTC89C52為眾多嵌入式控制應(yīng)用系統(tǒng)提供高靈活、超有效的解決方案。STC89C528kI/O口16位定時(shí)器/622種軟件可選擇節(jié)電模式?？臻e模式下，CPU停止工作，RAM、定時(shí)器/計(jì)數(shù)器、串口、中斷繼續(xù)工作。掉電保護(hù)方式下，RAM內(nèi)止。VCC:電源GND:地P0口是一個(gè)8位漏極開路的雙向8個(gè)TTL邏輯電平。對(duì)P0端口寫“1”時(shí)，引腳用作高阻抗輸入。當(dāng)訪問(wèn)外部程序和數(shù)據(jù)存8位地址/具有內(nèi)部上拉電阻。在flash編程時(shí)，P0程序校驗(yàn)時(shí)，需要外部上拉電阻。P1口是一個(gè)具有內(nèi)部上拉電阻的8位雙向I/O輸出緩沖器能驅(qū)動(dòng)4個(gè)TTLP1端口寫“1”（IIP1.0和P1.2分別作定時(shí)器計(jì)數(shù)器2（P1.0/T2）和時(shí)器/計(jì)數(shù)器2的觸發(fā)輸入（P1.1/T2EX），flash口接收低8位地址字節(jié)。P2口是一個(gè)具有內(nèi)部上拉電阻的8位雙向I/O輸出緩沖器能驅(qū)動(dòng)4個(gè)TTLP2端口寫“1”16位地址讀取外部數(shù)據(jù)存儲(chǔ)器（例如執(zhí)行MOVX@DPTR）口使用很強(qiáng)