半導(dǎo)體制程課件

OutlineIntroductionIntegratedCircuitandItsApplicationHowisICmade?OutlineIntroduction1一種相移振蕩器（1.3MHz)Ge襯底，晶體管及電阻、電容全部由Ge制成(面積約11.1x1.6mm2)擴(kuò)散工藝形成晶體管黑蠟掩蔽腐蝕形成Tr臺面結(jié)構(gòu)用細(xì)導(dǎo)線互連證明半導(dǎo)體材料不僅可用于制造分立器件，而且可以制造整個電子電路1958.9.12J.Kilby研制成功第一個半導(dǎo)體集成電路---“SolidCircuit”J.Kilby的發(fā)明－“固體電路”Kilby和他1958,7,24的設(shè)計(jì)一種相移振蕩器（1.3MHz)1958.9.12J.2MigrationofElectronicsManufacturingFrominception,electronicmanufacturinghasmigratedgeographicallyfromtheWesttotheEast:fromtheUSandEurope,overtoJapan,throughtheTaiwanarea,Korea,arrivingintheEast:ChinaandIndia.Theshiftinwaferproductiontypicallylagsbehindtherestofthesupplychain,butChinaandIndiaarenowattheforefrontofICproduction!23123MigrationofElectronicsManuf32000WWICMarket

China6%WWMarketOthers$57.80Japan$37.80U.S.A$57.90$9.8021%WWMarket2005WWICMarket

$40.80Others$82.10U.S.A$36.50Japan$33.00China2006WWICMarket

26%WWMarketOthers$87.44U.S.A$46.56$62.35Japan$57.05ChinaUS$billionSource:ICinsightsJanuary2007In2005,China’sICconsumptionreachedUSD$40.8billion,overtakingthetopspotastheworld’slargestregionalICmarketforthefirsttime.

By2010,China’sICmarketisestimatedtoreachUSD$124billionintermsofoverallconsumption.ChinaBecomesWorld’sLargestICMarket2000WWICMarketChina6%WW4ALeadingFoundryInTheWorldSMICBeijingSMICShanghaiSMICTianjinTianjinBeijingShanghaiWuhanChengduShenzhenSMICAssembly&Testing(Chengdu)SMICBeijingWuhanXinxin*ChengduCension*提供0.35-0.09微米的制程技術(shù)ALeadingFoundryInTheWorld5ICIndustryBusinessUnitICIndustryBusinessUnit6一條龍的集成代工服務(wù)DedicatedFullServiceProviderDesign

ServicesMaskMakingWaferManufacturingWaferProbingAssembly&FinalTestWaferBumpingSOPPLCCTSOPQFPBGAμBGAFlipChipCSP一條龍的集成代工服務(wù)Design

ServicesMask7半導(dǎo)體制程ppt課件82008-IC技術(shù)現(xiàn)狀I(lǐng)ntegrationof108–1010transistorsinachip.Clockfrequencyofmorethan3GHz.Cutofffrequencyof350GHzforSiGebipolar.Massproduction≧90nmAdvancedmanufacturing~65nmManufacturingdevelopment~45nmProcessanddeviceR&D≦32nm.Smallesttransistorrealized---5nmMOSFET2008-IC技術(shù)現(xiàn)狀I(lǐng)ntegrationof1089OutlineIntroductionIntegratedCircuitandItsApplicationHowisICmade?OutlineIntroduction10導(dǎo)體

半導(dǎo)體

絕緣體

半導(dǎo)體材料特性:

經(jīng)摻雜后，可藉由電場(電壓)、光、溫度、壓力、磁場等改變或控制其導(dǎo)電特性。

最廣為應(yīng)用的集成電路芯片材料：

硅

(Silicon,Si)。純硅導(dǎo)電特性差，

可藉摻雜(Doping,將雜質(zhì)加入硅片中)改變或控制其導(dǎo)電特性。

如何摻雜及控制雜質(zhì)在硅片中分布是半導(dǎo)體重要制程技術(shù)之一

。半導(dǎo)體Semiconductor導(dǎo)體 半導(dǎo)體 絕緣體半導(dǎo)體Semiconduct11分離式電路DiscreteCircuit分離式電路DiscreteCircuit12ITANIUMMICROPROCESSOR(1.72BillionTransistors90nm595mm2)ITANIUMMICROPROCESSOR13Tomakewafers,polycrystallinesiliconismelted.Themeltedsiliconisusedtogrowsiliconcrystals(oringots)thatareslicedintowafers.首先融化多晶硅，生成晶柱，然后切割成晶圓。RawMaterialforWafersTomakewafers,polycrystallin14Asliceofsemiconductormaterial,processedtohavespecifiedelectricalcharacteristics,especiallybeforeitisdevelopedintoanelectroniccomponentorintegratedcircuit.晶圓上的小顆粒，經(jīng)過處理后具有特殊電性用途。SemiconductorGlossary

半導(dǎo)體術(shù)語表Die晶粒Assembledsemiconductorelectroniccomponent.切割封裝好的半導(dǎo)體電子元件。Chip晶片、芯片Asmall,thin,circularsliceofasemiconductormaterial,suchasSilicon,onwhichrepeatedintegratedcircuitscanbeformed.半導(dǎo)體物質(zhì)(如純硅)小薄圓片，在上面可以形成一個個完整電路Wafer晶圓Asliceofsemiconductormater15SiliconTechnology矽(硅)技術(shù)6吋(15.24cm)8吋(20.32cm)12吋(30.48cm)1.78倍2.25倍(A)ProductionCapability(生產(chǎn)能力)(B)DesignCapability(設(shè)計(jì)能力)元件縮小0.18um(微米)0.13um(微米)1um(微米)

=百萬分之一米（m)=頭發(fā)的分之一頭發(fā)的分之一千萬SiliconTechnology矽(硅)技術(shù)6吋(16芯片分類及應(yīng)用

TypesofICs&Applications應(yīng)用領(lǐng)域Applications應(yīng)用領(lǐng)域應(yīng)用領(lǐng)域SometypesofICs芯片分類DRAM

動態(tài)隨機(jī)存儲器MPUs

微處理器Computer電腦ASIC

特定用途集成電路DSPs

數(shù)字信號處理器Consumer消費(fèi)Flash

閃存存儲器EEPROMs

電可擦除只讀存儲器Communi-

cation通訊芯片分類及應(yīng)用

TypesofICs&Applica17ElectronicPackageFirstlevelpackage(Single-chipmodule)Firstlevelpackage(Multi-chipmodule)Secondlevelpackage(PCBorcard)Thirdlevelpackage(Motherboard)ElectronicPackageFirstlevel18OutlineIntroductionIntegratedCircuitandItsApplicationHowisICmade?OutlineIntroduction19BuildinganICChipTape-out(usedtobealotofinformation—putontape)LikeablueprintforwaferproductionBuildinganICChipTape-out(u20HierarchyofICChipMultilevelMetallizationM1ContactVia1M2Via2M3Via3M4IMD3ILDIMD1IMD2BackendprocessFrontendActiveAreaDiffusionBarrier/AdhesionPromoterPlug電晶體(晶體管)MOSFET:Metal-Oxide-SemiconductorField-EffectTransistor連接線HierarchyofICChipMultilevel21晶圓芯片制作概述

WaferManufacturingOverview晶柱SiliconIngot芯片Wafer光罩制作/光刻離子植入切割、封裝電鍍(Die,晶粒)(Chip,晶芯)蝕刻MaskMaking/PhotolithographyIonImplantationAssembly&TestingElectroplatingEtching沉積Deposition晶圓芯片制作概述

WaferManufacturingO22

PHOTO(黃光)Module

ProcessProcedures(制程步驟):

(a)PR_coating(上光阻)

光阻見白光即反應(yīng)用黃光

(b)Photo_mask&exposure(上光罩及曝光)

(c)CDmeasurement(曝光后量測)

簡稱

ADI_CD (d)AfterDevelopInspection(曝光后檢查

)

簡稱

ADIPR:

PhotoResist

(光阻)

(化學(xué)物品)CD:

CriticalDimension

(重要尺寸)Mask(光罩)特殊光線曝光區(qū)光阻光阻光阻(1)大小或?qū)挾仁欠馩K?

(ADI_CD)(2)光阻是否曝開?

(ADI) PHOTO(黃光)ModuleProcessP23

PHOTO(黃光)Module

光阻區(qū)(PR)ADI_CDADI_CD光阻區(qū)(PR) PHOTO(黃光)Module光阻區(qū)(PR)24

ETCH(蝕刻)Module

ProcessProcedures(制程步驟):

(a)DryEtching(氣相蝕刻)

化學(xué)反應(yīng)后成氣體去除

(b)WET_PR_stripping(光阻去除,硫酸槽)

(c)CDmeasurement(蝕刻后量測)

簡稱AEI_CD (d)AfterEtchInspection(蝕刻后檢查)

簡稱

AEI光阻光阻Etchinggas(蝕刻氣體)光阻去除(WET)大小或?qū)挾仁欠馩K???

(AEI_CD)光阻同時會被吃掉一些 ETCH(蝕刻)ModuleProcessPr25

Thin-Film(薄膜)

Module

ProcessProcedures(制程步驟):

(a)Thinfilmdeposition(薄膜沉積,單片) (b)Thicknessmeasurement(沉積厚度量測) (c) Filmtypes(薄膜種類):

(i)

非導(dǎo)體:oxide(氧化物),nitride(氮化硅)

(ii)

導(dǎo)體:metal(金屬:

W,Ti,TiN,Al)Si3N4(氮化硅)SiH4(氣)+NH3((氣)

Si3N4(固)TiCl4(氣)+NH3((氣)

TiN(固)厚度符合要求?? Thin-Film(薄膜)ModuleProce26

CMP(化學(xué)機(jī)械研磨)Module

ProcessProcedures(制程步驟):

(a)ChemicalMechanicalPolishing(化學(xué)機(jī)械研磨)

簡稱

CMP

(b)單片研磨 (c)主要目的:表面平坦化 (d)Thicknessmeasurement(研磨后厚度量測)FilmCMP平坦化厚度符合要求?? CMP(化學(xué)機(jī)械研磨)ModuleProcess27

Diffusion(擴(kuò)散)Module

ProcessProcedures(制程步驟):

(a)Filmdeposition(爐管薄膜沉積,150片) (b)Thicknessmeasurement(沉積厚度量測) (c) Filmtypes(薄膜種類): (i)非導(dǎo)體:oxide(氧化物),nitride(氮化硅)

(ii)導(dǎo)體:Doped-poly&WSiFilmSi(固)+O2(氣)

SiO2(固)SiH4(氣)+NH3((氣)

Si3N4(固)厚度符合要求?? Diffusion(擴(kuò)散)ModuleProce28

WET(酸槽)Module

ProcessProcedures(制程步驟):

(a)Pre-cleanfordeposition(薄膜沉積前清洗) (b)FilmremovalbyWET(薄膜去除) (c)PRstrip(光阻去除)酸槽浸泡Surfaceclean(表面清洗)FilmdepositionFilmremoval薄膜或擴(kuò)散制程光阻去除或磷酸吃Si3N4 WET(酸槽)ModuleProcessPro29

Implant(離子植入)Module

ProcessProcedures(制程步驟):

(a)PhotoExposure(黃光曝光) (b)IonImplantation(離子植入)

簡稱

IMP (c)WET_PR_stripping(光阻去除,酸槽)Mask(光罩)特殊光線曝光區(qū)光阻光阻P+P+P+P+P+P+P+植入?yún)^(qū)光阻去除后(WET) Implant(離子植入)ModuleProce30

PHOTO(黃光)

制程&設(shè)備

ETCH(蝕刻)

制程&設(shè)備

Thin-Film(薄膜)--CVD

制程&設(shè)備

Thin-Film(薄膜)--PVD

制程&設(shè)備

CMP(化學(xué)機(jī)械研磨)

制程&設(shè)備

Diffusion(擴(kuò)散)

制程&設(shè)備

WET(酸槽)

制程&設(shè)備

Implant(離子植入)

制程&設(shè)備

Integration(制程整合)

Manufacture(制造部)半導(dǎo)體制造工程PHOTO(黃光)制程&設(shè)備半導(dǎo)體制造工程31BriefProcessFlow-IsolationP-sub(Siliconwafer)SiN(Nitride)Padoxide1.1.WaferStart1.2.PADOxidation

110A(stressbuffer)1.7.SiN(Nitride)Deposition1.5KA1.8.DiffusionLithography:1.8.1P.R.coating1.8.2StepperExposure1.8.3DevelopmentPhotoResistorcoatingDiffusionmaskStepperExposureDiffusionP.R.P-sub(Siliconwafer)SiN(Nitride)PadoxideBriefProcessFlow-Isolation32DiffusionP.R.P-sub(Siliconwafer)SiN(Nitride)PadoxideSTISTIBriefProcessFlow–Isolation(Cont)1.7.Trench(STI)PlasmaEtching1.7.1SiNEtching1.7.2SiliconEtching1.8.PhotoResistorremoveSEM(ScanningElectronicMicroscope)DiffusionP.R.SiN(Nitride)Pa33BriefProcessFlow–Isolation(Cont)1.7.APCVDSTIrefill1.7.1LinerOxideGrowth1.7.2APCVDOxidedeposition1.7.3STIFurnace1000CDensify1.8.STICMP(Chemical-MechanicalPolish)1.9.SiNremoveDiffusionP.R.P-sub(Siliconwafer)SiN(Nitrid)PadoxideSTISTISTIBriefProcessFlow–Isolation34N-WELLMaskBriefProcessFlow-WellformationP.R.CoatingN-WELLP.R.StepperExposure2.1N-WELLFormation:2.1.1N-WELLPRcoating2.1.2N-WELLLithography2.1.3Development2.1.4N-WELLimplant2.1.5PRstripping2.2P-WELLFormation:2.2.1P-WELLPRcoating2.2.2P-WELLLithography2.2.3Development2.2.4P-WELLimplant2.2.5PRstrippingP-sub(Silicon)Sac.oxideSTIPWELL

N-WELLP.R.CoatingP-WELLMaskStepperExposureN-WELLImplant1.N-WELL-12.N-WELL-27.PMOS-VT8.PMOSanti-punchP-WELLImplant1.P-WELL-12.P-WELL-27.NMOS-VT8.NMOSanti-punchN-WELLMaskBriefProcessFlow35BriefProcessFlow-GateOxideandPOLYPRcoatingP-sub(Silicon)NWELLPWELLGateOxideTGMaskStepperExposureGateOxide2UPOLYgrowth3GateOxideFormation:3.1ThickGateOxideGrowth3.2PRcoating3.3TGLithography3.4Development3.5RCA-AWetetching3.6PRstripping3.7ThinGateOxideGrowth4.PolyGrowth4.1undope.POLYgrowth4.2N+POLYPRcoating4.3N+POLYLithography4.4Development4.5N+POLYimplantandPRStripPRCoatingN+POLYMaskN+POLYPRN+POLYimplantStepperExposureTEM(TransmissionElectronMicroscope)BriefProcessFlow-GateOxid36BriefProcessFlow-GateEngineeringP-subNWELLSTIPWELLPolyPRcoatingPolyMaskNLDDN-LDDN-PKTN-LDDN-PKTP-LDDPR

P-LDDP-PKTStepperExposureN-LDDImplantP-LDDimplant5PolyGateFormation:5.1Polyannealing5.2PRcoating5.3POLYLithography5.4Development5.5POLYGateetching5.6PRstripping5.7ThinOxideGrowth6.LDD(LightDopeDrain)implant6.1N-LDDLithography(ellipsis)6.2NLDD/N-PKTimplant6.3P-LDDLithography(ellipsis)6.4PLDD/P-PKTimplantBriefProcessFlow-GateEngi37BriefProcessFlow-DrainEngineeringP-subNWELLSTIPWELLPolyPRcoatingPolyMaskNLDDN-LDDN-PKTN-LDDN-PKTP-LDDPR

P-LDDP-PKTN+PRN+N+P+PRP+P+ImplantN+implantGateOxideUMC.Fab8B.Generic0.25umlogicTi-SalicideProcessPolyTiSi2SpacerSourceDrainChannelLength7SpacerFormation:7.1PETEOSdep.7.2SiNdep.7.3Spacerdryetch8.SourceandDrainFormation:8.1N+Lithography8.2N+implant8.3PRstripping8.4P+Lithography8.5P+implant8.6PRstrippingBriefProcessFlow-DrainEng38BriefProcessFlow-ILDPassivationP-subNWELLSTIPWELLPolyPRcoatingPolyMaskNLDDN-LDDN-PKTN-LDDN-PKTP-LDDPR

P-LDDP-PKTN+PRN+N+P+PRP+SABPSGUSG9.SalicideFormation:9.1PETEOS-500ACapOxidedep.9.2SAB(Salicide-Block)Lithography(ellipsis)9.3Ti/Cosputtering9.4SalicidationRTPC49annealing9.5TiNresidualSemitoolwetclean9.6SalicidationRTPC54annealing10.ILDPassivation10.1SiN300Adeposition(Moistureandsodiumblock)10.2AP-USGdeposition(GapfillingandB,Ptrap)10.3TEOS-BPSG-14Kdeposition(re-flowandplanarization)10.4ILDCMPBriefProcessFlow-ILDPassi39P-subNWELLSTIPWELLPolyPRcoatingPolyMaskNLDDN-LDDN-PKTN-LDDN-PKTP-LDDPR

P-LDDP-PKTN+PRN+N+P+PRP+SABPSGUSGPRCoatingBriefProcessFlow-ContactPlug

ContactMask

PRcoatingContactPRMetal1DUVStepperExposure11.ContactPlugFormation:11.1ContactLithography11.2ContactPlasmaEtching11.3PRstrip11.4Barrierlayerdeposition(Ti+TiNforwellcontact)11.5RTPannealing11.6GlueLayerdeposition(Ti+TiNforplugadhesion)11.5WCVDfilling11.6WCMP11.7MetalLinerdeposition(Ti+TiNforMetaladhesion)11.8MetalSputterP-subNWELLSTIPWELLPolyPRcoati40BriefProcessFlow-Backendroutine(Aluminumline)P-subNWELLSTIPWELLPolyPRcoatingPolyMaskNLDDN-LDDN-PKTN-LDDN-PKTP-LDDPR

P-LDDP-PKTN+PRN+N+P+PRP+SABPSGUSGPRCoating

ContactMask

PRcoatingContactPRMetal1ContactplugPRCoatingMetal1maskMetal1PRMetal1HDP-1PEOXCapOxidePRCoatingMVIA1maskMVIA1PRMetal2

StepperExposureStepperExposure12.IMDdeposition12.1HDP-Oxidedeposition(Gapfilling)12.2PE-OxideDeposition(Planarizationanduniformity)12.3IMDCMP12.4CapPE-Oxide13.MVIAplugformation13.1MVIALithographycycle13.2MVIAEtchingandPRstrip13.3GlueLayerdeposition(Ti+TiNforplugadhesion)13.4WCVDfilling13.5WCMP13.6MetalLinerdeposition(Ti+TiNforMetaladhesion)13.7MetalSputterBriefProcessFlow-Backendr41BriefProcessFlow-AluminumlineMVIA1MVIA2MVIA3MVIA4MVIA5PassivationM5-8KM6-8KM4-5KM3-5KM2-5KM1-5KUMC.Fab8B.Generic0.25u