AT89C2051單片機畢業(yè)論文外文翻譯

1、AT89C2051 AT89C2051 is the United States of America ATMEL company p roducti on of low voltage, high p erforma nee CMOS 8 bit MCU, tablets containing the 2K bytes rep eated erasable read-only memory p rogram (P EROM) and 128bytes ran dom data memory (RAM), device using ATMELs high density, non-volati

2、le memory tech no logy, comp atible with sta ndard MCS-51 in structi on system in gen eral, sheet 8 bit CPU and Flash storage unit, AT89C2051 single-chip microcomputer in electronic p roducts in a wide range of app licati ons. In ternal structure AT89C2051 is a 2K byte flash programmable and erasabl

3、e read only memory (EEP ROM) low voltage, high performa nee 8 bit CMOS micro processor.lt uses ATMEL high-de nsity non-v olatile memory tech no logy manu facturi ng and in dustry sta ndard MCS-51 instruction set and pin structure compatible.Through the single chip combination of general CPLI and fla

4、sh memory, ATMEL AT89C2051 is a powerful micro p rocessor, which for many embedded con trol app licati ons to pro vide a highly flexible and low cost soluti on. AT89C2051 offers the following functions: Standard 2K memory, 128 bytes of RAM, 15 I/O, two 16 bit timer, a five vector two suspendedstruct

5、ure, a full duplex serial port, a precision analog comparator and two optional software power save mode.Free party stop CPU work but allows RAM, timer / counter, serial port and in terr upt system to continu e.The po wer-dow n mode saves the RAM content but the oscillator stops working and the prohi

6、bition of other parts of the work to the next a hardware reset. The con fide ntiality of the p rocedure AT89C2051 desig n p rocedures are 2 con fide ntial, con fide ntial 1 is p rogrammed, a p rogram memory can not be erased uni ess a p rogram ming, the security bit 2 is p rogrammed, p rogram cannot

7、 be read. Hardware and software devel opment AT89C2051 can use the following two methods and development of application systems. 1, because 89C2051 internal p rogram memory Flash, and modify it in side the program is very convenient, if equipped with a programmable 89C2051 p rogrammer.Debugg ing per

8、sonnel can use the p rogram edit ing - Comp ilati on - curi ng - in serted into a circuit board test such rep eated cycle method, for exp erie need MCS-51 p rogrammers, debugg ing this method is not very difficult.But to do this test would not be able to un dersta nd the internal RAM content and p r

9、ogram directi on and other releva nt in formatio n. 2, ordinary 8031/80C31 emulator simulation plug in P 1.0 P 1.7 and P3.0 P 3.6 out simulati on 2051, this method can use sin gle-ste p, break point debugg ing method, but the simulatio n is not true, for exa mp le, 2051 internal an alog comp arator

10、function, P1, P3 export enhan ceme nt un der ten sile cap acity etc. Pin descri ptio n AT89C2051 chip pin diagram The AT89C2051 pin diagram as show n on the right. In 1, VCC: po wer supply voltage. In 2, GND. In 3, P1: P1 is a 8 bit bidirectional I/O export.Port of P 1.2P 1.7 with internal puII-up r

11、esistor, P 1.0 and P 1.1 requires external pull up resistor.P1.0 and P 1.1 are resp ectively as on-chi p p recisi on an alog comp arator of the in-p hase input (ANI0) and the inverting input (AIN1).The P1 port out put buffer cap able of absorb ing 20mA curre nt and can directly dis play driver LED.W

12、he n the P1 port write 1, which can be used as input, whe n P 1.2 P 1.7 is used as the input pins and is externally p ulled low, they will because of in ternal write 1, which can be used as inpu t.Whe n the pin is P 1.2 P 1.7 as input and is exter nally p ulled low, they will because of internal pu

13、II-up resistor and the outflow curre nt. In 4, P3: P3 P3.0P3.5, P3.7 mouth with internal pull-up resistor seven bidirect ional I/O port.P 3.6 is used for fixing the input in the out put sig nal of the comp arator and it serves as a gen eral I/O pins that are not accessible .P3 port buffer can absorb

14、 20mA curre nt.Whe n the P3 export to write 1, they are internal p ull-up resistors are p ulled up and used as inpu t.As inpu t, is exter nally p ulled low P3 mouth foot will use the p ull-up resistor and the outflow curre nt. P3 is also used to achieve various AT89C2051 sec ond function, are listed

15、 in the followi ng table: Pin export function P3.0 RXD serial input port P3.1 TXD serial out put port P 3.2 INT0 external in terru pt 0 P3.3 INT1 external in terru pt 1 P3.4 T0 timer 0 external input P3.5 T1 timer 1 external input P3 also receives some for flash memory programming and verification p

16、rocess con trol sig nal. In 5, RST: reset inpu t. Once RST becomes the high level all the pins of the I/O is reset to 1 .Whe n the oscillator is running, continued to give RST pin two mach ine cycles of high level can compi ete reduct ion .Each mach ine cycle n eeds 12 oscillator or clock cycles. In

17、 6, XTAL1: as the oscillator inv erter input and internal clock gen erator input. In 7, XTAL2: as the oscillator the out put of the inverting amp lifier. Main p erforma nee In 1, and MCS-51 comp atibility; In 2, 2KB rep rogrammable memory FLASH (10000 times); In 3, 2.7-6V voltage range; 4, all stati

18、c work: 0Hz-24MH z; In 5, 2 level p rogram memory security lock; In 6, 128*8 in ternal RAM; 7, 15 p rogrammable I/O line; In 8, two and 16 timer / coun ter; 9, 6 in terr upt sources; 10, p rogrammable serial cha nn el; In 11, and high p recisi on voltage com parator (P1.0, P 1.1, P3.6); 12, direct d

19、rive LED out put port. AT89C2051是美國ATME公司生產(chǎn)的低電壓、高性能 CMOS位單片機，片內(nèi) 含2k bytes的可反復(fù)擦寫的只讀程序存儲器（PERO）和128bytes的隨機數(shù)據(jù)存 儲器（RAM，器件采用ATMEL公司的高密度、非易失性存儲技術(shù)生產(chǎn)，兼容標準 MCS-51指令系統(tǒng)，片內(nèi)置通用8位中央處理器和Flash存儲單元，AT89C2051單 片機在電子類產(chǎn)品中有廣泛的應(yīng)用。 AT89C2051是一帶有2K字節(jié)閃速可編程可擦除只讀存儲器 （EEPROM ）的低電壓，高性能 8位CMOS微處理器。它采用 ATMEL的高 密非易失存儲技術(shù)制造并和工業(yè)標準MC

20、S-51指令集和引腳結(jié)構(gòu)兼容。通過在 單塊芯片上組合通用的CPLI和閃速存儲器，ATMEL的AT89C2051是一強勁 的微型處理器，它對許多嵌入式控制應(yīng)用提供一定高度靈活和成本低的解決 辦法。 AT89C2051提供以下標準功能：2K字節(jié)閃速存儲器，128字節(jié)RAM， 15根I/O 口，兩個16位定時器，一個五向量兩級中斷結(jié)構(gòu)，一個全雙工串行 口，一個精密模擬比較器以及兩種可選的軟件節(jié)電工作方式?？臻e方停止 CPU工作但允許 RAM、定時器/計數(shù)器、串行工作口和中斷系統(tǒng)繼續(xù)工作。掉 電方式保存 RAM內(nèi)容但振蕩器停止工作并禁止有其它部件的工作到下一個 硬件復(fù)位。 AT89C2051設(shè)計有2個

21、程序保密位，保密位1被編程之后，程序存 儲器不能再被編程除非做一次擦除，保密位2被編程之后，程序不能被讀出。 AT89C2051可以采用下面兩種方法開發(fā)應(yīng)用系統(tǒng)。 1、由于89C2051內(nèi)部程序存貯器為Flash，所以修改它內(nèi)部的程序 十分方便快捷，只要配備一個可以編程89C2051的編程器即可。調(diào)試人員可 以采用程序編輯-編譯-固化-插到電路板中試驗這樣反復(fù)循環(huán)的方法，對于熟 練的MCS-51程序員來說，這種調(diào)試方法并不十分困難。但是做這種調(diào)試不能 夠了解片內(nèi)RAM的內(nèi)容和程序的走向等有關(guān)信息。 引出來仿真2051,這種方法可以運用單步、斷點的調(diào)試方法，但是仿真不夠真 實，比如，2051的內(nèi)

22、部模擬比較器功能, P1 口、P3 口的增強下拉能力等等。 P DIP/SOIC RSTrfVPPC 1 ivoc 3 It Jlpf J 仃C Ifl Fin 4 17| PI-S JfTAC C 5 14 3 If! 4 tnTo| pajc P3i C t 15 3 Pl 3 7 14 4 13 PS 1 fAtJJ話 * If OHD : 1曲 ml PJ7 ATB9QD5i1l AT89C2051芯片引腳圖 AT89C2051的引腳圖如右圖所示。 1、VCC :電源電壓。 2、GND :地。 3、P1 口： P1 口是一個 8位雙向 I/O 口。口引腳 P 1.2P 1.7提供內(nèi)部 上拉電阻，P1.0和P1.1要求外部上拉電阻。 P1.0和P1.1還分別作為片內(nèi)精密 模擬比較器的同相輸入(ANI0)和反相輸入 (AIN1)。P1 口輸出緩沖器可吸收 20mA電流并能直接驅(qū)動 LED顯示。當P1 口引腳寫入“1時，其可用作輸入 端，當引腳P 1.2-P 1.7