多點溫度巡檢系統(tǒng)外文翻譯

1、山東理工大學 畢業(yè)設計（外文翻譯材料）學 院：專 業(yè)：學生姓名：指導教師：電氣與電子工程學院電子信息工程劉曉陽王雅靜外文翻譯（原文）Based on SCM multi-functional temperature testing system design1、PrefaceWith the development of society and the technological progress, people pay more and more attention to the importance of temperature detection and display. Tempera

2、ture detection and status display technology and equipment has been widely applied in industries, products on the market emerge in endlessly. Temperature testing and also gradually adopt the automatic control technology to realize the monitor. This topic is a temperature testing and status of the mo

3、nitoring system.2、System solutionsThis system USES the monolithic integrated circuit AT89C51 as this system. The whole system, the hardware circuit including power supply circuit, sensor, the temperature display circuit circuit, upper alarm circuit . The alarming circuit can be measured in upper tem

4、perature range, screaming voice alarm. The basic principle for the temperature control DSl8B20: when the temperature signal acquisition to after temperature signal sent to handle, AT89C51 temperature to LCD screen, SCM according to initialize the upper temperature setting, namely, if the judgement o

5、f temperature than the highest temperature cooling fan is started, If the temperature is less than the lowest temperature setting on alarm device. 3、The system hardware design（1）AT89C51 SCM are introducedThe AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with 4K bytes of Flash pro

6、grammable and erasable read only memory (PEROM) and 128 bytes of data random-access memory(RAM). The device is manufactured using ATMEL Co.s high-density nonvolatile memory technology and is compatible with the industry-standard MCS-51 instruction set and pin-out. The on-chip Flash allows the progra

7、m memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the ATMEL Co.s AT89C51 is a powerful microcomputer which provides a highly-flexible and cost-effective solution to many embedded control appli

8、cations.Features:Compatible with instruction set of MCS-51 products4K bytes of in-system reprogrammable Flash memoryEndurance: 1000 write/erase cyclesFully static operation: 0 Hz to 24 MHzThree-level program memory lock1288-bit internal RAM32 programmable I/O linesTwo 16-bit Timer/CountersSix interr

9、upt sourceProgrammable serial channelLow-power idle and Power-down modesFunction Characteristic Description:The AT89C51 provides the following standard features: 4K bytes of Flash memory, 128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, a five vector two-level interrupt architecture, a ful

10、l duplex serial port, on-chip oscillator and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and inter

11、rupt system to continue functioning. The Power-down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset.Pin Description:VCC: Supply voltageGND: GroundPort 0: Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port,

12、each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high impedance inputs.Port 0 may also be configured to be the multiplexed low order address/bus during accesses to external program and data memory. In this mode P0 has internal pull ups. Port 0 also rece

13、ives the code bytes during Flash programming, and outputs the code bytes during program verification. External pull ups are required during program verification.Port 1: Port 1 is an 8-bit bidirectional I/O port with internal pull ups. The Port 1 output buffers can sink/source four TTL inputs. When 1

14、s are written to Port 1 pins they are pulled high by the internal pull ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pull ups. Port 1 also receives the low-order address bytes during Flash programming and

15、verification.Port 2: Port 2 is an 8-bit bi-directional I/O port with internal pull ups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by the internal pull ups and can be used as inputs. As inputs, Port 2 pins that are externally be

16、ing pulled low will source current (IIL) because of the internal pull ups.Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory which uses 16-bit addresses (MOVX DPTR). In this application, it uses strong internal pull ups wh

17、en emitting 1s. During accesses to external data memory which uses 8-bit addresses (MOVX RI). Port 2 emits the contents of the P2 Special Function Register.Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.Port 3: Port 3 is an 8-bit b

18、i-directional I/O port with internal pull ups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled high by the internal pull ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL)

19、because of the pull ups.Port 3 also receives some control signals for Flash programming and verification.RST: Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device.ALE/: Address Latch Enable output pulse for latching the low byte of the address duri

20、ng accesses to external memory. This pin is also the program pulse input () during Flash programming. In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during e

21、ach access to external Data Memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in

22、 external execution mode.：Program Store Enable is the read strobe to external program memory. When the AT89C51 is executing code from external program memory, is activated twice each machine cycle, except that two activations are skipped during each access to external data memory.EA/VPP：External Acc

23、ess Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program executio

24、ns. This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming, for parts that require 12-volt VPP.XTAL1：Input to the inverting oscillator amplifier and input to the internal clock operating circuit.XTAL2：Output from the inverting oscillator amplifier.Ready/: The pr

25、ogress of byte programming can also be monitored by the RDY/output signal. P3.4 is pulled low after ALE goes high during programming to indicate BUSY. P3.4 is pulled high again when programming is done to indicate READY.Oscillator Characteristics：XTAL1 and XTAL2 are the input and output, respectivel

26、y, of an inverting amplifier which can be configured for use as an on-chip oscillator. Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven.There are no requirements on the duty cycle of th

27、e external clock signal, since the input to the internal clocking circuitry is through a divide by two flip trigger, but minimum and maximum voltage high and low time specifications must be observed.Idle Mode：In idle mode, the CPU puts itself to sleep while all the on-chip peripherals remain active.

28、 The mode is invoked by software. The content of the on-chip RAM and all the special functions registers remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a hardware reset.It should be noted that when idle is terminated by a hardware reset, the device

29、normally resumes program execution, from where it left off, up to two machine cycles before the internal reset algorithm takes control. On-chip hardware inhibits access to internal RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to

30、 a port pin when Idle is terminated by reset, the instruction following the one that invokes Idle should not be one that writes to a port pin or to external memory.Power-down Mode:In the power-down mode, the oscillator is stopped, and the instruction that invokes power-down is the last instruction e

31、xecuted. The on-chip RAM and special function registers retain their values until the power-down mode is terminated. The only exit from power-down is a hardware reset. Reset redefines the special function registers but does not change the on-chip RAM. The reset should not be activated before VCC is

32、restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize.Program Memory Lock Bits:When lock bit 1 is programmed, the logic level at the EA pin is sampled and latched during reset. If the device is powered up without a reset, the latc

33、h initializes to a random value, and holds that value until reset is activated. It is necessary that the latched value of EA be in agreement with the current logic level at that pin in order for the device to function properly.Programming the Flash:The AT89C51 is normally shipped with the on-chip Fl

34、ash memory array in the erased state (that is, contents = FFH) and ready to be programmed. The programming interface accepts either a high-voltage (12-volt) or a low-voltage (VCC) program enable signal. The low-voltage programming mode provides a convenient way to program the AT89C51 inside the user

35、s system, while the high-voltage programming mode is compatible with conventional third party Flash or EPROM programmers.The AT89C51 is shipped with either the high-voltage or low-voltage programming mode enabled. The AT89C51 code memory array is programmed byte-by-byte in either programming mode. T

36、o program any nonblank byte in the on-chip Flash memory, the entire memory must be erased using the chip erase mode. Programming Algorithm: Before programming the AT89C51, the address, data and control signals should be set up according to the Flash programming mode table .To program the AT89C51, ta

37、ke the following steps:1. Input the desired memory location on the address lines.2. Input the appropriate data byte on the data lines.3. Activate the correct combination of control signals.4. Raise EA/VPP to 12V for the high-voltage programming mode.5. Pulse ALE/once to program a byte in the Flash a

38、rray or the lock bits. The byte-write cycle is self-timed and typically takes no more than 1.5ms. Repeat steps 1 through 5, changing the address and data for the entire array or until the end of the object file is reached.Data Polling: The AT89C51 features Data Polling to indicate the end of a write

39、 cycle. During a write cycle, an attempted read of the last byte written will result in the complement of the written datum on PO.7. Once the write cycle has been completed, true data are valid on all outputs, and the next cycle may begin. Data polling may begin any time after a write cycle has been

40、 initiated.Program Verify: If lock bits LB1 and LB2 have not been programmed, the programmed code data can be read back via the address and data lines for verification. The lock bits cannot be verified directly. Verification of the lock bits is achieved by observing that their features are enabled.C

41、hip Erase: The entire Flash array is erased electrically by using the proper combination of control signals and by holding ALE/ low for 10 ms. The code array is written with all “1”s. The chip erase operation must be executed before the code memory can be re-programmed.Reading the Signature Bytes: T

42、he signature bytes are read by the same procedure as a normal verification of locations 030H, 031H, and 032H, except that P3.6 and P3.7 must be pulled to a logic low. The values returned are as follows:(030H) = 1EH indicates manufactured by ATMEL(031H) = 51H indicates AT89C51 single-chip(032H) = FFH

43、 indicates 12V programming(032H) = 05H indicates 5V programmingProgramming Interface:Every code byte in the Flash array can be written and the entire array can be erased by using the appropriate combination of control signals. The write operation cycle is self timed and once initiated, will automati

44、cally time itself to completion.（2）The sensor DS18B20In the traditional analog signal distance temperature measuring system, need good solve lead error compensation, multi-point measurement error and amplifying circuit switching technologies such as zero drift error problem, can achieve high measuri

45、ng accuracy. Another general monitoring site of the electromagnetic environment is very bad, all kinds of jamming signal is stronger, the simulated temperature signal interference and vulnerable to produce measurement error and measuring precision 5. Therefore, in temperature measuring system, the s

46、trong anti-jamming capability of the new digital temperature sensor is the most effective to solve these problems, compared with other temperature sensor DSl820 has the following features:(1) the unique singleline interface way. DSl820 in connection with the microprocessor only need one interface to

47、 implement line DSl820 microprocessors and two-way communication. (2) more function simplifies distributed temperature detection application. (3) DSl820 in use without any peripheral devices. (4) power, voltage range data available from 3.0 V to 5.5 V. (5) can measure temperature range from - 55 deg

48、rees c + + to 125, incremental value 0. 5 c, Fahrenheit temperature range from - 67 to + 257, incremental value 0.9. (6) support multi-point network function. Multiple DS1820 can pick on the same bus and, more temperature measurement. (7) 9 temperature resolution. Measuring results in nine serial tr

49、ansmission way the digital quantity. (8) user can set temperature alarm threshold. (9) have super temperature search function.DSl8B20 principle of workThe internal structure of DS18B20 DSl8B20 temperature measurement principle diagram shown in figure 3.2. Low temperature coefficient graph oscillatio

50、n frequency vibration product temperature is used to produce with fixed frequency, pulse signal to counter l. High temperature coefficient crystals temperature-dependent its oscillation frequency change significantly. The signal generated as the counter 2 input pulses. Counter 1, 2 and temperature r

51、egisters are counter in - 55 degrees preset corresponding a base value. Counter l to low temperature coefficient of the pulse signal generated crystals, when the counter for subtraction counting the preset value reduced to 1, when the temperature counter O value will add l, counter the preset value

52、will be l man again, to counter the l start low temperature coefficient of crystal oscillator pulse signal, so cycle count until the counter 2, stop counting to O accumulative temperature, temperature of the register for the register is measured values. Figure 3.2 accumulative used for the slope com

53、pensation and fixed temperature measurement, the output of the process of nonlinear correction is less than the preset value counter l.AT89C51 interface mode and DS18B20Chip DS18B20 and the connection has two kinds: namely parasitic power and external power supply mode.Parasitic power way: in the pa

54、rasitic power supply mode, the signal from the single chip DS18B20 in line drawing energy during the high level in the DQ energy stored in the internal capacitance, low level in signal in the energy consumed during the capacitance on working until high-level coming again to parasitic power (battery)

55、. Parasitic power mode has three advantages: 1) distance measuring temperature, without the local power supply. 2) no conventional power in the condition reads the ROM. 3) circuit, with only one more concise root I/O realize temperature measurement. Want to make precise temperature conversion chip D

56、S18B20, I/O line must ensure that the temperature conversion period, due to provide enough energy conversion in temperature during each DS18B20, when the current 1mA to work a few temperature sensor in the same root hanging on the I/O multi-point temperature measurement, only by 4.7 K and resistance

57、 will not be able to provide enough energy, which cannot be switchover temperature or errors.The external power source supply way: in the external power supply modes, DS18B20 work power by VDD pin, I/O access line does not need strong pull up, there is no shortage of electricity power, can ensure ac

58、curacy and conversion in the bus theory can be articulated multiple sensor DS18B20, multipoint temperature measuring system.This system USES the external power source. Connection method is one foot grounding and DS18B20 2 feet (DQ) and AT89C51 foot an I/O port, 3 feet line up + 5V. A89S52 in the I/O

59、 port and + 5V connection between a 4.7 K pull-up resistors, to ensure the normal operation of the data collection. If you want to test system, composed multi-point temperature in the same root chip I/O port in the same line, and the method of connecting the parallel more pieces of DS18B20 chip.（3）LCD1