EDA實(shí)驗(yàn)報(bào)告三(3-8譯碼器的設(shè)計(jì))

1、實(shí)驗(yàn)三：3-8譯碼器的設(shè)計(jì)一、實(shí)驗(yàn)?zāi)康摹W(xué)習(xí)Quartus II 7.2軟件設(shè)計(jì)平臺。、了解EDA的設(shè)計(jì)過程。、通過實(shí)例，學(xué)習(xí)和掌握 Quartus II 7.2平臺下的文本輸入法。4、學(xué)習(xí)和掌握3-8譯碼器的工作和設(shè)計(jì)原理。5、初步掌握該實(shí)驗(yàn)的軟件仿真過程。二、實(shí)驗(yàn)儀器PC機(jī)，操作系統(tǒng)為Windows7/Xp本課程所用系統(tǒng)均為WindowsXP下同)，Quartus II 7.2設(shè)計(jì)平臺。三、實(shí)驗(yàn)步驟1、創(chuàng)建工程，在File菜單中選擇 New Project Wizard ，彈出對話框 如下圖所New Project Wizard : Directory, Njme, Top-Levef E

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6、打開波形編輯器，新建一個(gè)波形仿真文件,NewD evice D esign Files 也曰 FilesAHDL Include FileBlock Symbol FileChain Description FifeHexadecimal (Iritel-FormaA File In-SAtern Sources and PioLe$ Editor File Logic AnalyzerIrilerFace FileMemory Initialisation File SigrialTap II Logic AnaAzer File SAnopsys Design Constraints Fi

7、le Tel Script File TeA FileVector Waveform FileOK | Uanuel |然后選擇菜單“ View fUtility ” fNodeFinder ”出現(xiàn)如下對話框， 在“Filter ” 中選擇“ Pins : all ”，再點(diǎn)擊“ List ”即在下邊的“ Node Found ”框中出現(xiàn)本設(shè)計(jì) 項(xiàng)目中所有端口引腳列表，并逐個(gè)拖到波形編輯器的窗口中。Node FinderNamed pLuk ih :Nodes FoLnd:Name-BC -Y_AP -A14Yl - xYl巨七匕PYrY|1-_3 Filtm | Pins: allCustom

8、ize.I*3JSelected Nodes:h/ Include AdbenllieAOKCancelAlignments -UnassignedUnassignedUnassignedUnassignedUnassignedUnassignedUnaAigrHsdUnassignAdUriiBS$ignedUnassignedUnassignedN呂mej |varisble_deMdei|&Ivaridble_decod5ifl ?Ivariable.decoderC 尋 IvariableAdeooderfY| 至riable_clecodef|Y0| |variable_deoode

9、iY1) LZ |variable_decodei|Y YE VKDA011嘰睜3NaneABC回L6.選擇菜單“ Tools圖:45120. 01ni40. D mSO. 0 m80.01ns.1。. 0 its12Netlist Viewers ” 一 “ RTL viewer ”得到如下 電路hJLsjf!3UMU-bJ.7、引腳分配(1)選擇菜單“ Assignments f “Pins”命令，在分配編輯器的“ Category列表 f Location pin ，出現(xiàn)如圖引腳分配界面：:Named: Q三| 刪 Edit Xj JFihi:| 尸）心吾!Node NameL 00 tianReserveGroup03*13OutputP N S4T?-OJ9OutputPIN 53y7.oiinO ilOutputPIN_5211& noOutputPIN.51rp.jo12?ncw node(2)引腳鎖定的器件平面視圖6s 64O B 1111 K r? ?177 rsT4 7372 M 7? St &i t?p ? ? ? (DOOOO? o O 9 wo-J 1. 0o o oOJJ y ?-4 )1 c-145Top View5- 1. 一 sEL 3&-r-941 .&管SL0剔J*