實驗三：狀態(tài)機實現(xiàn)序列檢測器設(shè)計

1、FPGA課程報告設(shè)計題目：狀態(tài)機實現(xiàn)序列檢測器設(shè)計學(xué)生班級：學(xué)生學(xué)號：學(xué)生姓名：指導(dǎo)教師：時 間：成 績：一、實驗?zāi)康?理解有限狀態(tài)機的概念；掌握有限狀態(tài)機的狀態(tài)圖的畫法及其含義二、實驗原理：本次實驗的內(nèi)容是：應(yīng)用有限狀態(tài)機設(shè)計思路，檢測輸入的串行 數(shù)據(jù)是否是”11100101，”本次實驗由頂層文件、串行檢測、并行數(shù)據(jù) 轉(zhuǎn)串行、數(shù)碼管顯示四個模塊組成。并行數(shù)據(jù)轉(zhuǎn)串行數(shù)據(jù)模塊功能是：可以異步復(fù)位，可以在時鐘控制 下，將并行輸入數(shù)據(jù) din7:0，按照 din7，din6，din5，din4， din3，din2，din1，din0的順序輸出至串行檢測模塊的輸入端口 din。串行檢測模塊：輸入信號

2、：DIN-1bit的串行輸入數(shù)據(jù)CLK-同步輸入時鐘CLR 異步清零信號，當(dāng)CLR=1,系統(tǒng)輸出置0,否則，系統(tǒng)正常工作輸出信號：AB4bits數(shù)據(jù)，如果系統(tǒng)檢測到“11100101”這8bit的輸入，AB=4b1010，否則，AB=4b1011.三、實驗過程：1.首先建立一個新的工程，添加一個新的Verilog Module文件，然后寫入并行數(shù)據(jù)轉(zhuǎn)串行數(shù)據(jù)模塊的代碼，代碼如下:4621module xulie(clkf din8,reset, din47always (cur_state or din8 or din )2248begin23input elk;49case(cur_3tat

3、e)24input7:0 din8;50sQ :begin25input reset;51din = din87;26output din;52next_state = si;2753end28parameter54si :begin29sO = SbOOO,55din = dln86;30si = 3b001f56next_state = s2;31s2 = SbOlO,57end32s3 = SbOll,58s2 :begin33s4 = 3blOO,59din = dln85;34s5 = 3blOl,0next_state = s3;35s6 = SbllO,61end36s7 = 3

4、blll;62s3 :begin3763din = dn84;38reg2:0 cur_statefnext_state;64next_state = s4;39reg din;65end4066s4 :begin41always (pasedge elk orpasedge reset67din = dln83;42if (reset68next_state = s5;43cur_state = s0;44else69end45cur state = nextstate;70s5:begin71din = din82;72next_sta.te = s6;73end74s6:begin75d

5、in = dinS1;76next_state = s7;77end78s7 :begin79din = din80;80next_sta.te = s0;81end82default : begin83din = IbO;84next_sta.te = sO;85end86endca.se87end88endiriodule進行仿真，仿真圖如下:丁 zjyiemogr/、十由熱k八ei碼，代碼如下:1module schk(dinf clkf reset,AE input din,clkf reset;495051a:beginif (din=dat：a 6 Q=t；24output 3:0

6、AB;52else Q=zero;25reg 3 : 0 M ;53end26reg 7：Q；uqh -27paranneter zero=8 bOOOOOOOO;I1 JLr 28parameter a=8bOOOOOOOl;55begin29parameter b=8bOOOOOOlO;5if(din=data5)Q=c;30parameter c=8bOOOOOlOO;57else Q=zero;31parameter (1=800001000;R.5a n ri32parameter 6=800010000;7 U33parameter =800100000;59c :34parame

7、ter g=8bOlOOOOOO;,60begin35paranneter h=8 blOOOOOOO;,61if(din=data4)Q=d;36parameter da.ta=8 blllOOlOl;,62else Q=c;37always (posedge elk: or poseilge reset38if(reset63end39begind:40Q=zero;,65begin41end= *1 a = Tri q e 3 Cif(din=data3)Q=e；C _L i3 E JUgULlL case(Q)7else Q=a;44zero :,63end4ShAfri n.6 91

8、=:74f:75begin70begin71if (din=data 2 Q=f;7fiif(din=datd1) Q=g;72else Q=zero;77else Q=b;73end73end79g：30begin31if(din=datd0) Q=h;32else Q=zero;S3end34h:35begin36if(din=datd7) Q=a;37else Q=zero;mmend3 9default:90Q=zeror91endedse92end93always(Q)94begin95(Q=g)96AB=4t：1010;97else93AB;37:然后將新的頂層文件經(jīng)行綜合，確認無

9、誤后，新建一個Test BenchWaveForm文件，進行仿真，仿真圖如下:Current Simulation Time: 2000 nsO nsI I I I200 ns400 ns600 ns800 nsI I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I1板1000 ns-I I I I I I I I I I I I出ns200 ns1400 ns1600 nsI I I I I I I I I I I I I I I I I I I I1800 ns 2000 nsI I I I I I I I I I I I

10、 IH 蜀4 LED7S6：07711F(7711F)Ek、7h1F(77177乂 斤仟娜 LED7S60LnqJI LED7S50LED7S41凱 LED7S31IjLED7S21qJI LED7S(11X或 LED7S01恣咬由! DUTY_CYCLE0.50.5渤! elk1n n n n n n n n n n .n n n r i n n n n rH 郭 din87:08hE5(g X871 EfqJI din871KjJl din861qJI din851郵 din840qJI din830KjJl din821rqJI din810qJI din801iqJI reset0I

11、L添加消抖模塊，然后編寫新的頂層文件，將消抖模塊與上面的模塊例化在一起，代碼如下：21 module top(clk_50f elk,reset,dinB,LED7S24input elk,clk_50;25Input reset;26input 7：0 dinB;27entput 6:0 LED7S;2 329wire;3031debo jnce_iiaQclule kl ( clk_50, reset, elk, Fin_Oat);32XULIEQI k2 (Fin_OJtr dinS, reset, LED7S). ;3334endiruodale保存后生成新的頂層文件:Oxc3S500

12、e-5fg320=j|yjiwtop (tfp w)回訂三；i7鬲虱蚯liiiU:招招F- 0k2 - XIFUEQI (Xl.FUEQI. v：iyl ul - xijI i e (xiil i e. v)yl ij2 - sctik I.sctik. v.lvu3 - de cl e dT e (de cl edTs. v)完成以上操作后，執(zhí)行綜合確認無誤，經(jīng)行鎖引腳操作:鎖引腳完成后，編輯、修改約束文件:1METclk IOC = nV16 | PULLDOWN;2METnclk 50rr LOC = rrC9n,3METrrreset rr 1QC =| FU11DOWN；45MET,

13、rdin3rr LOC =Nl?MET,rdin-Brr LOC =HIS7METtlln3n LOC =gMET,rdin3rr IOC =FPL13rr9MET,rdin-Brr IOC =rfE3rr10MET,rdin3rr LOC =11MET,rdin-Brr LOC =12METtiln3n LOC =1314MET,rLED7Srr IOC =打1)5忤15MET,rLED7Srr LOC =時C5怦16MET,rLED7Srr LOC =,17METrrLED75rr LOC =WE7,12METrrLED7Srr ICC =ft FP 押r19MET,rLED7Srr IOC =FfA4rrr2 0MET,rLED7Srr IOC =%4抑21METclk C1OCK_DEDZCATED_ROUTE=FALSE;生成下載配置