基于51單片機(jī)驅(qū)動SI4432無線模塊收發(fā)C語言程序

1、基于51單片機(jī)驅(qū)動SI4432無線模塊收發(fā)C語言程序#include <reg52.h>#include <ABSACC.h>#include <intrins.h>#include <stdio.h>/-RF4432配置口定義-/sbit        RF4432_PAC=P24;                /收發(fā)模式切換控制端sbit    RF4432_SDO=P35;   

2、            /SPI數(shù)據(jù)輸出sbit    RF4432_SDI=P34;                /SPI數(shù)據(jù)輸入sbit    RF4432_SCLK=P37;               /SPI時鐘輸入端口sbit    RF4432_SEL=P33;     

3、          /SPI片選sbit    RF4432_IRQ=P32;                /SI4432工作狀態(tài)指示端口sbit    KEY=P36;               /BLT53A上電控制端sbit    LED_GREEN=P21;sbit    P1

4、5=P15;/-射頻芯片相關(guān)定義-#define RF4432_TxRxBuf_Len 32                            /定義RF4432數(shù)據(jù)包長度char    RF4432_TxRxBufRF4432_TxRxBuf_Len;unsigned char Packet30=9,20,30,21,15,58,56,69,25,23,12,25,56,22,23,24;/Transmit packetunsig

5、ned char Length=4;unsigned char Data_Buf10;unsigned char Data_Len;typedef enum _RF_ENUM        RF_OK  =  0x00,                        /function response parameters        RF_ERROR_TIMING

6、0; = 0x01,        RF_ERROR_PARAMETER = 0x02,        RF_PACKET_RECEIVED = 0x03,        RF_NO_PACKET = 0x04,        RF_CRC_ERROR = 0x05, RF_ENUM;/-RF4432 配置寄存器地址-#define DEVICE_TYPE 0x00#define EVICE_VE

7、RSION 0x01   /版本號#define DEVICE_STATUS 0x02   /設(shè)備狀態(tài)#define INTERRUPT_STATUS_1 0x03#define INTERRUPT_STATUS_2 0x04#define INTERRUPT_ENABLE_1 0x05#define INTERRUPT_ENABLE_2 0x06#define OPERATING_FUNCTION_CONTROL_1 0x07        /工作模式和功能控制1

8、#define OPERATING_FUNCTION_CONTROL_2 0x08        /工作模式和功能控制2#define CRYSTAL_OSCILLATOR_LOAD_CAPACITANCE 0x09        /晶振負(fù)載電容設(shè)置#define MICROCONTROLLER_OUTPUT_CLOCK 0x0A#define GPIO0_CONFIGURATION 0x0B        /GPIO0功能設(shè)置寄存器見英文文檔第105頁#defin

9、e GPIO1_CONFIGURATION 0x0C#define GPIO2_CONFIGURATION 0x0D#define IO_PORT_CONFIGURATION 0x0E#define ADC_CONFIGURATION 0x0F#define ADC_SENSOR_AMPLIFIER_OFFSET 0x10#define ADC_VALUE 0x11#define TEMPERATURE_SENSOR_CONTROL 0x12        /溫度傳感器校準(zhǔn)#define TEMPERATURE_V

10、ALUE_OFFSET 0x13#define WAKE_UP_TIMER_PERIOD_1 0x14#define WAKE_UP_TIMER_PERIOD_2 0x15#define WAKE_UP_TIMER_PERIOD_3 0x16#define WAKE_UP_TIMER_VALUE_1 0x17#define WAKE_UP_TIMER_VALUE_2 0x18#define LOW_DUTY_CYCLE_MODE_DURATION 0x19        #define LOW_BATTERY_DE

11、TECTOR_THRESHOLD 0x1A        /低壓檢測閾值寄存器#define BATTERY_VOLTAGE_LEVEL 0x1B#define IF_FILTER_BANDWIDTH  0x1C        /中頻濾波器帶寬寄存器#define AFC_LOOP_GEARSHIFT_OVERRIDE 0x1D#define AFC_TIMING_CONTROL 0x1E#define CLOCK_RECOVERY_GEARSHIFT_OVERRIDE

12、60;0x1F#define CLOCK_RECOVERY_OVERSAMPLING_RATIO 0x20#define CLOCK_RECOVERY_OFFSET_2 0x21#define CLOCK_RECOVERY_OFFSET_1 0x22#define CLOCK_RECOVERY_OFFSET_0 0x23#define CLOCK_RECOVERY_TIMING_LOOP_GAIN_1 0x24#define CLOCK_RECOVERY_TIMING_LOOP_GAIN_0 0x25#define RECEIVED_SIGNAL_STRENGTH_INDI

13、CATOR 0x26#define RSSI_THRESHOLD_FOR_CLEAR_CHANNEL_INDICATOR 0x27#define ANTENNA_DIVERSITY_REGISTER_1 0x28#define ANTENNA_DIVERSITY_REGISTER_2 0x29#define DATA_ACCESS_CONTROL 0x30#define EZMAC_STATUS 0x31#define HEADER_CONTROL_1 0x32        /Header 起始碼設(shè)置#define HEADER_CONTROL_2 0

14、x33#define PREAMBLE_LENGTH 0x34        /前導(dǎo)碼長度#define PREAMBLE_DETECTION_CONTROL 0x35        /前導(dǎo)碼檢測設(shè)置#define SYNC_WORD_3 0x36        /同步字節(jié)#define SYNC_WORD_2 0x37#define SYNC_WORD_1 0x38#define SYNC_WORD_0 0x39#define TRANSMIT

15、_HEADER_3  0x3A#define TRANSMIT_HEADER_2  0x3B#define TRANSMIT_HEADER_1  0x3C#define TRANSMIT_HEADER_0 0x3D#define TRANSMIT_PACKET_LENGTH 0x3E        /發(fā)送數(shù)據(jù)包長度，詳細(xì)請看P125頁#define CHECK_HEADER_3 0x3F#define CHECK_HEADER_2 0x40#define CHECK_HEADER_1

16、0x41#define CHECK_HEADER_0 0x42#define HEADER_ENABLE_3  0x43#define HEADER_ENABLE_2  0x44#define HEADER_ENABLE_1  0x45#define HEADER_ENABLE_0  0x46#define RECEIVED_HEADER_3  0x47#define RECEIVED_HEADER_2  0x48#define RECEIVED_HEADER_1  0x49#define RECEIVED_HEA

17、DER_0  0x4A#define RECEIVED_PACKET_LENGTH 0x4B        /接收數(shù)據(jù)包長度，詳細(xì)請看P134頁#define ANALOG_TEST_BUS  0x50#define DIGITAL_TEST_BUS_ENSCTEST_  0x51#define TX_RAMP_CONTROL 0x52#define PLL_TUNE_TIME 0x53        /鎖相環(huán)切換時間#define CALIBR

18、ATION_CONTROL 0x55#define MODEM_TEST 0x56#define CHARGEPUMP_TEST 0x57#define CHARGEPUMP_CURRENT_TRIMMING_OVERRIDE                 0x58#define DIVIDER_CURRENT_TRIMMING              

19、                                0x59#define VCO_CURRENT_TRIMMING                                       &#

20、160;                0x5A#define VCO_CALIBRATION_OVERRIDE                                              0x5B#define SYNTHESIZER

21、_TEST                                                         0x5C#define BLOCK_ENABLE_OVERRIDE_1            &

22、#160;                                            0x5D#define BLOCK_ENABLE_OVERRIDE_2                         

23、                               0x5E#define BLOCK_ENABLE_OVERRIDE_3                                       

24、                   0x5F#define CHANNEL_FILTER_COEFFICIENT_ADDRESS                              0x60#define CHANNEL_FILTER_COEFFICIENT_VALUE  

25、0;                           0x61#define CRYSTAL_OSCILLATOR_CONTROL_TEST                                     &

26、#160;    0x62#define RC_OSCILLATOR_COARSE_CALIBRATION_OVERRIDE                 0x63#define RC_OSCILLATOR_FINE_CALIBRATION_OVERRIDE                          

27、;0x64#define LDO_CONTROL_OVERRIDE_ENSPOR                                               0x65#define LDO_LEVEL_SETTING          

28、0;                                                              0x66#define DELTASIGMA_ADC_TUNING_1         &#

29、160;                                                0x67#define DELTASIGMA_ADC_TUNING_2                  

30、                                           0x68#define AGC_OVERRIDE_1                           

31、60;                                              0x69#define AGC_OVERRIDE_2   0x6A#define GFSK_FIR_FILTER_COEFFICIENT_ADDRESS           

32、;                   0x6B#define GFSK_FIR_FILTER_COEFFICIENT_VALUE                                     0x6C#define TX_POWER   

33、0x6D   /發(fā)射功率設(shè)置,詳細(xì)請見P153#define TX_DATA_RATE_1    0x6E        /數(shù)據(jù)發(fā)送波特率設(shè)置寄存器1#define TX_DATA_RATE_0    0x6F        /數(shù)據(jù)發(fā)送波特率設(shè)置寄存器0#define MODULATION_MODE_CONTROL_1  0x70        /調(diào)制方式控制,詳細(xì)請見P155#define MO

34、DULATION_MODE_CONTROL_2  0x71#define FREQUENCY_DEVIATION  0x72#define FREQUENCY_OFFSET_1   0x73#define FREQUENCY_OFFSET_2  0x74#define FREQUENCY_BAND_SELECT  0x75        /頻段選擇,詳細(xì)請見P157#define NOMINAL_CARRIER_FREQUENCY_1  0x76 

35、;       /基準(zhǔn)載波頻率#define NOMINAL_CARRIER_FREQUENCY_0  0x77#define FREQUENCY_HOPPING_CHANNEL_SELECT  0x79        /跳頻頻道選擇,詳細(xì)請見P158#define FREQUENCY_HOPPING_STEP_SIZE  0x7A        /跳頻頻道間隔#define TX_FIFO_CONTROL_1  0x7C#d

36、efine TX_FIFO_CONTROL_2  0x7D#define RX_FIFO_CONTROL  0x7E#define FIFO_ACCESS  0x7F  /FIFO讀寫方式設(shè)置，/-RF4432控制指令-#define RR                0x00#define WR                0x80      

37、0;                                         /-延時-void delay_10us(char n)        int i;        while(n-)        for(i=0;i<5;i+);void d

38、elay_ms(int num)           int x,y;           for(y=0;y<num;y+)                         for(x = 0;x < 500;x)             

39、60;   x+;           /-SPI單字節(jié)讀取函數(shù)-unsigned char SPI_Read(void)             unsigned char i,rxdata;        rxdata = 0x00;        for (i = 0;i < 8;i+)         

40、              rxdata = rxdata<<1;                RF4432_SCLK=1;                RF4432_SDO=1;                if (RF4432_SDO=1)   

41、                    /讀取最高位，保存至最末尾，通過左移位完成整個字節(jié)                                        rxdata |= 0x01;              &

42、#160;                 else                                        rxdata &= 0x01;                     

43、;           delay_10us(2);                        RF4432_SCLK=0;                delay_10us(2);                 

44、0;        return rxdata;  /-SPI單字節(jié)寫入函數(shù)-void SPI_Write(unsigned char txdata)        unsigned char i;        for (i = 0;i < 8;i+)                        if (txdata&

45、amp;0x80)        /總是發(fā)送最高位                                    RF4432_SDI=1;                              &

46、#160; else                                      RF4432_SDI=0;                                RF4432_SCLK=1;

47、60;               txdata = txdata<<1;                RF4432_SCLK=0;                /-RF4432寄存器讀取函數(shù)- void  RF4432_ReadReg(unsigned char  addr, unsigne

48、d char *RegisterData)        RF4432_SEL=0;                          SPI_Write(addr|RR);              *RegisterData = SPI_Read();       

49、           RF4432_SEL=1;         /-RF4432寄存器寫入函數(shù)- void  RF4432_WriteReg(unsigned char  addr, unsigned char value)        RF4432_SEL=0;              &#

50、160;           SPI_Write(addr|WR);              SPI_Write(value);                  RF4432_SEL=1;                 /-

51、RF4432寄存器讀取函數(shù)- void RF4432_ReadBurestReg(unsigned char  addr,unsigned char  *p,unsigned char  count)        unsigned char i;        RF4432_SEL=0;                  &#

52、160;       SPI_Write(addr|RR);                    for(i=0;i<count;i+)                        pi = SPI_Read();            

53、        RF4432_SEL=1;         /-RF4432射頻芯片初始化函數(shù)- void RF4432_Init(void)        unsigned char RegisterData;        /unsigned int  i,j;        delay_ms(20);delay_ms(20);  &

54、#160;     delay_ms(20);delay_ms(20);        delay_ms(20);delay_ms(20);        RF4432_ReadReg(0x03,&RegisterData);/read the Interrupt Status1 register        RF4432_ReadReg(0x04,&RegisterData);/read the Interrupt Status2 re

55、gister        /SW reset         RF4432_WriteReg(0x07, 0x80);/write 0x80 to the Operating & Function Control1 register         /wait for chip ready interrupt from the radio (while the nIRQ pin is high)      

56、   while(RF4432_IRQ);        /read interrupt status registers to clear the interrupt flags and release NIRQ pin         RF4432_ReadReg(0x03, &RegisterData);        RF4432_ReadReg(0x04, &RegisterData);     &#

57、160;   /*set the physical parameters*/         /set the center frequency to 434 MHz         RF4432_WriteReg(0x75, 0x57); /write 0x75 to the Frequency Band Select register         RF4432_WriteReg(0x76, 0x19); /write 0xBB

58、to the Nominal Carrier Frequency1 register         RF4432_WriteReg(0x77, 0x00); /write 0x80 to the Nominal Carrier Frequency0 register         /set the desired TX data rate (9.6kbps)         RF4432_WriteReg(0x6E, 0x13); /writ

59、e 0x4E to the TXDataRate 1 register         RF4432_WriteReg(0x6F, 0xA9); /write 0xA5 to the TXDataRate 0 register         RF4432_WriteReg(0x70, 0x2C); /write 0x2C to the Modulation Mode Control 1 register         RF4432_Write

60、Reg(0x58, 0x80);        /VCO        /set the TX power to MAX        RF4432_WriteReg(0x6D, 0x1F);        /write 0x1F to the TX Power register         /*set the modem parameters according to the ex

61、el calculator(parameters: 4.8 kbps, deviation: 50 kHz, channel filter BW: 102.2 kHz*/        RF4432_WriteReg(0x1C, 0xAD);/write 0x1E to the IF Filter Bandwidth register                        RF4432_WriteReg(0x20, 0

62、xE2);/write 0xD0 to the Clock Recovery Oversampling Ratio register                        RF4432_WriteReg(0x21, 0x80);/write 0x00 to the Clock Recovery Offset 2 register                 

63、;       RF4432_WriteReg(0x22, 0x1A);/write 0x9D to the Clock Recovery Offset 1 register                        RF4432_WriteReg(0x23, 0x37);/write 0x49 to the Clock Recovery Offset 0 register        &#

64、160;               RF4432_WriteReg(0x24, 0x00);/write 0x00 to the Clock Recovery Timing Loop Gain 1 register                        RF4432_WriteReg(0x25, 0x04);/write 0x24 to the Clock Recovery T

65、iming Loop Gain 0 register                        RF4432_WriteReg(0x1D, 0x44);/enable afc        RF4432_WriteReg(0x1E, 0x0A);        RF4432_WriteReg(0x2A, 0x2C);        RF4432

66、_WriteReg(0x1F, 0x03);                RF4432_WriteReg(0x69, 0x60);/write 0x40 to the AFC Loop Gearshift Override register                        RF4432_WriteReg(0x72, 0x70);/write 0x48 to th

67、e Frequency Deviation register        /set the preamble length to 10bytes if the antenna diversity is used and set to 5bytes if not        RF4432_WriteReg(0x34, 0xCF); /write 0x0C to the Preamble Length register         /set preamble d

68、etection threshold to 20bits         RF4432_WriteReg(0x35, 0x20); /write 0x2A to the Preamble Detection Control register         /Disable header bytes; set variable packet length (the length of the payload is defined by the      

69、  /received packet length field of the packet); set the synch word to two bytes long         RF4432_WriteReg(0x33, 0x02); /write 0x02 to the Header Control2 register         /Set the sync word pattern to 0x2DD4         R

70、F4432_WriteReg(0x36, 0x2D); /write 0x2D to the Sync Word 3 register         RF4432_WriteReg(0x37, 0xD4); /write 0xD4 to the Sync Word 2 register         /enable the TX & RX packet handler and CRC-16 (IBM) check         RF

71、4432_WriteReg(0x30, 0x8D); /write 0x8D to the Data Access Control register         /Disable the receive header filters         RF4432_WriteReg(0x32, 0x00 ); /write 0x00 to the Header Control1 register         /enable FIFO mod

72、e and GFSK modulation         RF4432_WriteReg(0x71, 0x2B); /write 0x63 to the Modulation Mode Control 2 register        /*set the GPIO's according the testcard type*/        RF4432_WriteReg(0x0B, 0x0A); /write 0x12 to the GPIO0 Con

73、figuration(set the TX state)         RF4432_WriteReg(0x0C, 0x0A); /write 0x15 to the GPIO1 Configuration(set the RX state)        /set the AGC         RF4432_WriteReg(0x69, 0x35); /write 0x0B to the AGC Override 2 register &#

74、160;       /set ADC reference voltage to 0.9V         RF4432_WriteReg(0x68, 0x07); /write 0x04 to the Deltasigma ADC Tuning 2 register         /set Crystal Oscillator Load Capacitance register         RF4432_Wr

75、iteReg(0x09, 0x7F); /write 0xD7 to the Crystal Oscillator Load Capacitance register        RF4432_WriteReg(0x73,0x00);        RF4432_WriteReg(0x74,0x00);        /TxFIFOReset();        RF4432_WriteReg(0x08, 0x01);  &

76、#160;     RF4432_WriteReg(0x08, 0x00);        /RxFIFOReset();        RF4432_WriteReg(0x08, 0x02);        RF4432_WriteReg(0x08, 0x00);/-RF4432設(shè)置接收模式函數(shù)- void RF4432_SetRxMode(void)        unsigned char Regis

77、terData;                RF4432_WriteReg(0x0E, 0x02);/Rx_EN;         /enable the packet valid interrupt        RF4432_WriteReg(0x05, 0xFF);         RF4432_WriteReg(0x06, 0x00); 

78、60;             RF4432_ReadReg(0x03, &RegisterData);        RF4432_ReadReg(0x04, &RegisterData);        /enable receiver chain    RF4432_WriteReg(0x07, 0x05);/-RF4432數(shù)據(jù)包接收函數(shù)-unsigned char RF4432_RxPacket(voi

79、d)        unsigned char temp;        RF4432_IRQ=1;                if(!RF4432_IRQ)                        RF4432_ReadReg(INTERRUPT_STATUS_1,&temp); 

80、;                if(temp&0x02)                                        return 1;                  

81、0;                             return 0;void RFIdle(void)        unsigned char RegisterData;                             

82、60;                 RF4432_WriteReg(0x07, 0x01);        /diasble all ITs        RF4432_WriteReg(0x05, 0x00);        RF4432_WriteReg(0x06, 0x00);            

83、0;   RF4432_ReadReg(0x03, &RegisterData);        RF4432_ReadReg(0x04, &RegisterData);        void RFTransmit(unsigned char * packet, unsigned char length)        unsigned char temp;        unsigned char

84、 RegisterData;                  RF4432_WriteReg(0x0E, 0x01);/Tx_EN;                                                 

85、0;       RF4432_WriteReg(0x3e, length);                                                for(temp=0;temp<length;temp+)           

86、             RF4432_WriteReg(0x7f,packettemp);                                                              &#

87、160;                                                          /enable the wanted ITs        RF4432_WriteReg(0x05, 0x04); 

88、;       RF4432_WriteReg(0x06, 0x00);                RF4432_ReadReg(0x03, &RegisterData);        RF4432_ReadReg(0x04, &RegisterData);        /enable transmitter        RF443

89、2_WriteReg(0x07, 0x09);                 while(RF4432_IRQ);/while(GPIO_ReadInputDataBit(GPIOB,GPIO_Pin_12);                                RF4432_ReadReg(0x03, &Regist

90、erData);        RF4432_ReadReg(0x04, &RegisterData);        RF_ENUM RFPacketReceived(unsigned char * packet, unsigned char * length)        unsigned char i;        unsigned char RegisterData;     

91、   if( RF4432_IRQ = 0 )                        RF4432_ReadReg(0x03,&RegisterData);                if( (RegisterData & 0x01) = 0x01 )/CRC error           

92、60;                           RF4432_SetRxMode();                        return RF_CRC_ERROR;                       

93、;         if( (RegisterData & 0x02) = 0x02 )/packet received                                        /read buffer                  &

94、#160;     RF4432_ReadReg(0x4b,length);                        for(i=0;i<*length;i+)                                                        RF4432_ReadReg(0x7f,packet+);