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折疊式級聯(lián)運放的仿真折疊式級聯(lián)運放的仿真TheTypicalPerformanceofOp-AmpOpen-LoopDifferentialGain(AV)Common-modeRejectionRatio(CMRR)PowerSignalRejectionRatio(PSRR)PhaseMargin(PM)InputCommonModeRange(ICMR)OutputSwingRange(OSR)Input/OutputImpedance(CIN/ROUT)SlewRateNoiseTheTypicalPerformanceofOp-TheSchematicofFoldedCascodeOp-AmpInordertodeceasethepowerConsumption,IBIASisonly30nA.

TheSchematicofFoldedCascodCreateSchematicandSymbolinSpectreTocreateasymbolofaschematic:FromDesign->CreateCellview->FromCellviewCreateSchematicandSymbolinOpen-LoopDifferentialGainDCSweepVP-VN(largesignal)ACSweepVP-VNwithfixedfrequency(smallsignal)TwomethodsofsimulatingOpen-LoopDifferentialGainisavailableinADE(AnalogDesignEnvironment)Open-LoopDifferentialGainDCTest-BenchofOpen-LoopDifferentialGain(method1)

DCSweepVP-VN(largesignal)Inthismethod,VP=VCM_IN+x,andVN=VCM_IN-xWhere,VCM_IN

isthecommonvoltage,xisadesignvariables.SetupVNSetupVPTest-BenchofOpen-LoopDifferADEofOpen-LoopDifferentialGain(method1)ToaddamodelforthesimulationFromADE->Setup->ModellibrariesTocreateaDCSweepFromADE->Analyses->Choose->DCADEofOpen-LoopDifferentialWaveformofOpen-LoopDifferentialGain(method1)Where,

DifferentialGainis71.56dBToobtainVCOM_OUT

FromCalculator->SpecialFunctions->ValueVOUT-VCOM_OUTToobtainDCgainFromCalculator->SpecialFunctions->derivWaveformofOpen-LoopDifferenTest-BenchofOpen-LoopDifferentialGain(method2)

ACSweepVP-VNwithfixedfrequencySetupVNSetupVPInthismethod,VP=VCM_IN+x+VAC,andVN=VCM_INWhere,VCM_IN

istheinputcommonvoltage,xisadesignvariables,VACisaACvoltageforACSweep.Test-BenchofOpen-LoopDifferADEofOpen-LoopDifferentialGain(method2)ToaddamodelforthesimulationFromADE->Setup->ModellibrariesTocreateaACSweepFromADE->Analyses->Choose->ACFixedFreqADEofOpen-LoopDifferentialWaveformofOpen-LoopDifferentialGain(method2)DifferentialGainis65.56dBTheresultsofthetwomethodsaredifferent,Infact,method1ismoreaccurateforDCgain.WaveformofOpen-LoopDifferenCommon-modeRejectionRatio

Youcangetdetailillustrationfrom“CMOSAnalogCircuitDesign”,PhillipE.Allen,OxfordUniversityPress,Inc.Common-modeRejectionRatioYoTest-BenchofCMRRWhere,

VCOM_IN

istheinputcommonvoltage,VACisaACvoltageforACSweep.Test-BenchofCMRRWhere,VCOMADEofCMRRToaddamodelforthesimulationFromADE->Setup->ModellibrariesTocreateaACSweepFromADE->Analyses->Choose->ACADEofCMRRToaddamodelforWaveformofCMRR1/CMRRCMRRToobtainCMRR:FromCalculator->1/x1/CMRRandCMRRplotdirectly.WaveformofCMRR1/CMRRCMRRTooWaveformofCMRRToobtainmagnitudePlotofCMRR:FromCalculator->dB20FrequencyresponseofCMRRTheCMRRis72.14dBatlowfrequencyrange.ToobtainphasePlotofCMRR:FromCalculator->phaseWaveformofCMRRToobtainmagnPowerSignalRejectionRatio

Youcangetdetailillustrationfrom“CMOSAnalogCircuitDesign”,PhillipE.Allen,OxfordUniversityPress,Inc.PowerSignalRejectionRatioYTest-BenchofPSRRWhere,

VACisaACvoltageforACSweep,andVDCisaDCvoltageTest-BenchofPSRRWhere,VACADEofPSRRToaddamodelforthesimulationFromADE->Setup->ModellibrariesTocreateaACSweepFromADE->Analyses->Choose->ACADEofPSRRToaddamodelforWaveformofPSRR1/PSRRPSRRToobtainCMRR:FromCalculator->1/x1/PSRRandPSRRplotdirectly.WaveformofPSRR1/PSRRPSRRTooWaveformofPSRRToobtainmagnitudePlotofPSRR:FromCalculator->dB20FrequencyresponseofPSRRTheCMRRis79.17dBatlowfrequencyrange.ToobtainphasePlotofPSRR:FromCalculator->phaseWaveformofPSRRToobtainmagnPhaseMarginofOpen-loopfrequencyResponse

Where,VCM_INistheinputcommonvoltage,VACisaACvoltageforACSweep,AndCListheloadingcapacitor.PhaseMarginofOpen-loopfreqTest-BenchofPMVCM_INVACThedominantpoleiscontrolledbyCL

infoldedCascodeopamp.Test-BenchofPMVCM_INVACThedADEofPMToaddamodelforthesimulationFromADE->Setup->ModellibrariesTocreateaACSweepFromADE->Analyses->Choose->ACADEofPMToaddamodelforthWaveformofPMToobtainmagnitudePlotofopen-loop:FromCalculator->dB20open-loopfrequencyresponseThePMis74owhenCLis5pf.ToobtainphasePlotofopen-loop:FromCalculator->phase

Therehavetwopolesinopen-loopfrequencyresponse,oneisthedominantpoleofoutputnet,andtheanotheristhemirrorpolecausedbyactivecurrentmirror.

WaveformofPMToobtainmagnitInputCommon-modeRangeWhere,xisadesignvariablesandCListheloadingcapacitor.InputCommon-modeRangeWhere,Test-BenchofICMRTest-BenchofICMRADEofICMRToaddamodelforthesimulationFromADE->Setup->ModellibrariesTocreateaDCSweepFromADE->Analyses->Choose->DCADEofICMRToaddamodelforWaveformofICMRICMRTheinputcommon-moderangeis0~4.2VWaveformofICMRICMRTheinputOutputSwingRangeWhere,VCM_IN

istheinputcommonvoltage,xisadesignvariables.

ToobtainOSROutputSwingRangeWhere,VCM_ITest-BenchofOSRDCSweepVP-VN

Inthismethod,VP=VCM_IN+x,andVN=VCM_IN-xWhere,VCM_IN

isthecommonvoltage,xisadesignvariables.SetupVNSetupVPTest-BenchofOSRDCSweepVPADEofOSRToaddamodelforthesimulationFromADE->Setup->ModellibrariesTocreateaDCSweepFromADE->Analyses->Choose->DCADEofOSRToaddamodelforWaveformofOSRYoucangettheleftwaveformfrompage8.OSRTheoutputswingrangeisfrom842.5mVto4.381V.PS:OSRisdependenceofapplicationsandisnotconstant.

WaveformofOSRYoucangeInputCapacitorWhere,VCM_IN

istheinputcommonvoltage,VACisACvoltageforACSweep.

InputCapacitorWhere,VCM_INiTest-BenchofCINVCM_INVACTest-BenchofCINVCM_INVACADEofCINToaddamodelforthesimulationFromADE->Setup->ModellibrariesTocreateaACSweepFromADE->Analyses->Choose->ACADEofCINToaddamodelfortWaveformofCIN

Theinputcapacitorisapproximateof5pfWaveformofCINTheinputcapaOutputResistanceTheschematicofobtainingopen-loopoutputresistanceRO.TheequivalentmodelbyusingTheveninformOntheopamp.Thus,simulatingROUTandknowingAVallowsonetocalculatetheoutputresistanceROoftheopamp.OutputResistanceTheschematTest-BenchofROUTIOUTVOUT200RR=1GVIN=0VTest-BenchofROUTIOUTVOUT200RADEofROUTToaddamodelforthesimulationFromADE->Setup->ModellibrariesTocreateaTRANSweepFromADE->Analyses->Choose->TRANADEofROUTToaddamodelforWaveformofROUT

IOUTROUTWaveformofROUTIOUTROUTSlewRateTheunity-gainconfigurationplacestheseverestrequirementsonstabilityandslewratebecauseitsfeedbackisthelargest,resultinginthelargestvaluesofloop-gain,andshouldalwaysbeusedasaworst-casemeasurement.SlewRateTheunity-gainTest-benchofSlewRateTheinputstepmagnitudeis2V.Test-benchofSlewRateTheinpADEofSRToaddamodelforthesimulationFromADE->Setup->ModellibrariesTocreateaTranFromADE->Analyses->Choose->TranADEofSRToaddamodelfortWaveformofSR

SR=95.1KV/sWaveformofSRSR=95.1KV/sNoiseThermalNoise(A)channelnoise(id)(A)RSnoise(rs)(A)RDnoise(rd)FlickerNoise(fn)NoiseThermalNoiseTest-BenchofNoiseVCM_INVACThedominantpoleiscontrolledbyCL

infoldedCascodeopamp.Test-BenchofNoiseVCM_INVACThADEofNoiseToaddamodelforthesimulationFromADE->Setup->ModellibrariesTocreateaNoiseFromADE->Analyses->Choose->noiseADEofNoiseToaddamodelforWaveformofNoiseOutputnoiseInput-referrednoiseToobtainoutputnoiseandinput-referrednoise:FromADE->results->Directplot->mainformWaveformofNoiseOutputnoiseI折疊式級聯(lián)運放的仿真折疊式級聯(lián)運放的仿真TheTypicalPerformanceofOp-AmpOpen-LoopDifferentialGain(AV)Common-modeRejectionRatio(CMRR)PowerSignalRejectionRatio(PSRR)PhaseMargin(PM)InputCommonModeRange(ICMR)OutputSwingRange(OSR)Input/OutputImpedance(CIN/ROUT)SlewRateNoiseTheTypicalPerformanceofOp-TheSchematicofFoldedCascodeOp-AmpInordertodeceasethepowerConsumption,IBIASisonly30nA.

TheSchematicofFoldedCascodCreateSchematicandSymbolinSpectreTocreateasymbolofaschematic:FromDesign->CreateCellview->FromCellviewCreateSchematicandSymbolinOpen-LoopDifferentialGainDCSweepVP-VN(largesignal)ACSweepVP-VNwithfixedfrequency(smallsignal)TwomethodsofsimulatingOpen-LoopDifferentialGainisavailableinADE(AnalogDesignEnvironment)Open-LoopDifferentialGainDCTest-BenchofOpen-LoopDifferentialGain(method1)

DCSweepVP-VN(largesignal)Inthismethod,VP=VCM_IN+x,andVN=VCM_IN-xWhere,VCM_IN

isthecommonvoltage,xisadesignvariables.SetupVNSetupVPTest-BenchofOpen-LoopDifferADEofOpen-LoopDifferentialGain(method1)ToaddamodelforthesimulationFromADE->Setup->ModellibrariesTocreateaDCSweepFromADE->Analyses->Choose->DCADEofOpen-LoopDifferentialWaveformofOpen-LoopDifferentialGain(method1)Where,

DifferentialGainis71.56dBToobtainVCOM_OUT

FromCalculator->SpecialFunctions->ValueVOUT-VCOM_OUTToobtainDCgainFromCalculator->SpecialFunctions->derivWaveformofOpen-LoopDifferenTest-BenchofOpen-LoopDifferentialGain(method2)

ACSweepVP-VNwithfixedfrequencySetupVNSetupVPInthismethod,VP=VCM_IN+x+VAC,andVN=VCM_INWhere,VCM_IN

istheinputcommonvoltage,xisadesignvariables,VACisaACvoltageforACSweep.Test-BenchofOpen-LoopDifferADEofOpen-LoopDifferentialGain(method2)ToaddamodelforthesimulationFromADE->Setup->ModellibrariesTocreateaACSweepFromADE->Analyses->Choose->ACFixedFreqADEofOpen-LoopDifferentialWaveformofOpen-LoopDifferentialGain(method2)DifferentialGainis65.56dBTheresultsofthetwomethodsaredifferent,Infact,method1ismoreaccurateforDCgain.WaveformofOpen-LoopDifferenCommon-modeRejectionRatio

Youcangetdetailillustrationfrom“CMOSAnalogCircuitDesign”,PhillipE.Allen,OxfordUniversityPress,Inc.Common-modeRejectionRatioYoTest-BenchofCMRRWhere,

VCOM_IN

istheinputcommonvoltage,VACisaACvoltageforACSweep.Test-BenchofCMRRWhere,VCOMADEofCMRRToaddamodelforthesimulationFromADE->Setup->ModellibrariesTocreateaACSweepFromADE->Analyses->Choose->ACADEofCMRRToaddamodelforWaveformofCMRR1/CMRRCMRRToobtainCMRR:FromCalculator->1/x1/CMRRandCMRRplotdirectly.WaveformofCMRR1/CMRRCMRRTooWaveformofCMRRToobtainmagnitudePlotofCMRR:FromCalculator->dB20FrequencyresponseofCMRRTheCMRRis72.14dBatlowfrequencyrange.ToobtainphasePlotofCMRR:FromCalculator->phaseWaveformofCMRRToobtainmagnPowerSignalRejectionRatio

Youcangetdetailillustrationfrom“CMOSAnalogCircuitDesign”,PhillipE.Allen,OxfordUniversityPress,Inc.PowerSignalRejectionRatioYTest-BenchofPSRRWhere,

VACisaACvoltageforACSweep,andVDCisaDCvoltageTest-BenchofPSRRWhere,VACADEofPSRRToaddamodelforthesimulationFromADE->Setup->ModellibrariesTocreateaACSweepFromADE->Analyses->Choose->ACADEofPSRRToaddamodelforWaveformofPSRR1/PSRRPSRRToobtainCMRR:FromCalculator->1/x1/PSRRandPSRRplotdirectly.WaveformofPSRR1/PSRRPSRRTooWaveformofPSRRToobtainmagnitudePlotofPSRR:FromCalculator->dB20FrequencyresponseofPSRRTheCMRRis79.17dBatlowfrequencyrange.ToobtainphasePlotofPSRR:FromCalculator->phaseWaveformofPSRRToobtainmagnPhaseMarginofOpen-loopfrequencyResponse

Where,VCM_INistheinputcommonvoltage,VACisaACvoltageforACSweep,AndCListheloadingcapacitor.PhaseMarginofOpen-loopfreqTest-BenchofPMVCM_INVACThedominantpoleiscontrolledbyCL

infoldedCascodeopamp.Test-BenchofPMVCM_INVACThedADEofPMToaddamodelforthesimulationFromADE->Setup->ModellibrariesTocreateaACSweepFromADE->Analyses->Choose->ACADEofPMToaddamodelforthWaveformofPMToobtainmagnitudePlotofopen-loop:FromCalculator->dB20open-loopfrequencyresponseThePMis74owhenCLis5pf.ToobtainphasePlotofopen-loop:FromCalculator->phase

Therehavetwopolesinopen-loopfrequencyresponse,oneisthedominantpoleofoutputnet,andtheanotheristhemirrorpolecausedbyactivecurrentmirror.

WaveformofPMToobtainmagnitInputCommon-modeRangeWhere,xisadesignvariablesandCListheloadingcapacitor.InputCommon-modeRangeWhere,Test-BenchofICMRTest-BenchofICMRADEofICMRToaddamodelforthesimulationFromADE->Setup->ModellibrariesTocreateaDCSweepFromADE->Analyses->Choose->DCADEofICMRToaddamodelforWaveformofICMRICMRTheinputcommon-moderangeis0~4.2VWaveformofICMRICMRTheinputOutputSwingRangeWhere,VCM_IN

istheinputcommonvoltage,xisadesignvariables.

ToobtainOSROutputSwingRangeWhere,VCM_ITest-BenchofOSRDCSweepVP-VN

Inthismethod,VP=VCM_IN+x,andVN=VCM_IN-xWhere,VCM_IN

isthecommonvoltage,xisadesignvariables.SetupVNSetupVPTest-BenchofOSRDCSweepVPADEofOSRToaddamodelforthesimulationFromADE->Setup->ModellibrariesTocreateaDCSweepFromADE->Analyses->Choose->DCADEofOSRToaddamodelforWaveformofOSRYoucangettheleftwaveformfrompage8.OSRTheoutputswingrangeisfrom842.5mVto4.381V.PS:OSRisdependenceofapplicationsandisnotconstant.

WaveformofOSRYoucangeInputCapacitorWhere,VCM_IN

istheinputcommonvoltage,VACisACvoltageforACSweep.

InputCapacitorWhere,VCM_INiTest-BenchofCINVCM_INVACTest-BenchofCINVCM_INVACADEofCINToaddamodelforthesimulationFromADE->Setup->ModellibrariesTocreateaACSweepFromADE->Analyses->Choose->ACADEofCINToaddamodelfortWaveformofCIN

Theinputcapacitorisapproximateof5pfWaveformofCINTheinputcapaOutputResistanceTheschematicofobtainingopen-loopoutputresistanceRO.TheequivalentmodelbyusingTheveninformOn

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