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PAGE外文原文:StructureandfunctionoftheMCS-51StructureandfunctionoftheMCS-51seriesone-chipcomputerMCS-51isanameofapieceofone-chipcomputerserieswhichIntelCompanyproduces.Thiscompanyintroduced8top-gradeone-chipcomputersofMCS-51seriesin1980afterintroducing8one-chipcomputersofMCS-48seriesin1976.Itbelongtoalotofkindsthislineofone-chipcomputerthechipshave,suchas8051,8031,8751,80C51BH,80C31BH,etc.,theirbasiccomposition,basicperformanceandinstructionsystemareallthesame.8051dailyrepresentatives-51serialone-chipcomputers.Anone-chipcomputersystemismadeupofseveralfollowingparts:(1)Onemicroprocessorof8(CPU).(2)AtslicedatamemoryRAM(128B/256B),itusenotdeposittingnotcanreading/datathatwrite,suchasresultnotmiddleofoperation,finalresultanddatawantedtoshow,etc.(3)ProcedurememoryROM/EPROM(4KB/8KB),isusedtopreservetheprocedure,someinitialdataandforminslice.ButdoesnottakeROM/EPROMwithinsomeone-chipcomputers,suchas8031,8032,80C,etc..(4)Four8runsidebysideI/OinterfaceP0fourP3,eachmouthcanuseasintroduction,mayuseasexportingtoo.(5)Twotimer/counter,eachtimer/countermaysetupandcountintheway,usedtocounttotheexternalincident,cansetupintoatimingwaytoo,andcanaccordingtocountorresultoftimingrealizethecontrolofthecomputer.(6)Fivecutoffcuttingoffthecontrolsystemofthesource.(7)OneallduplexingserialI/OmouthofUART(universalasynchronousreceiver/transmitter(UART)),isitrealizeone-chipcomputerorone-chipcomputerandserialcommunicationofcomputertousefor.(8)Stretchoscillatorandclockproducecircuit,quartzcrystalfinelytuneelectriccapacityneedouter.Allowoscillationfrequencyas12megahertasnowatmost.Everytheabove-mentionedpartwasjoinedthroughtheinsidedatabus.Amongthem,CPUisacoreoftheone-chipcomputer,itisthecontrolofthecomputerandcommandcentre,madeupofsuchpartsasarithmeticunitandcontroller,etc..Thearithmeticunitcancarryon8personsofarithmeticoperationandunitALUoflogicoperationwhileincludingone,the1storingdevicetemporariliesof8,storingdevice2temporarily,8'saccumulationdeviceACC,registerBandprocedurestateregisterPSW,etc.PersonwhoaccumulateACCcountby2inputendsenteredofcheckingetc.temporarilyasoneoperationoften,comefrompersonwhostore1operationisitisitmakeoperationtogoontocounttemporarily,operationresultandloopbackACCwithanotherone.Inaddition,ACCisoftenregardedasthetransferstationofdatatransmissionon8051inside.Thesameasgeneralmicroprocessor,itisthebusiestregister.HelprememberingthatagreeingwithAexpressesintheorder.Thecontrollerincludestheprocedurecounter,theorderisdepositted,theorderdecipher,theoscillatorandtimingcircuit,etc.Theprocedurecounterismadeupofcounterof8fortwo,amountsto16.Itisabyteaddresscounteroftheprocedureinfact,thecontentisthenextIAthatwillcarriedoutinPC.Thecontentwhichchangesitcanchangethedirectionthattheprocedurecarriesout.Shakethecircuitin8051one-chipcomputers,onlyneedouterquartzcrystalandfrequencytofinelytunetheelectriccapacity,itsfrequencyrangeisits12MHZof1.2MHZ.Thispulsesignal,as8051basicbeatsofworking,namelytheminimumunitoftime.8051isthesameasothercomputers,theworkinharmonyunderthecontrolofthebasicbeat,justlikeanorchestraaccordingtothebeatplaythatiscommanded.ThereareROM(procedurememory,canonlyread)andRAMin8051slices(datamemory,canisitcanwrite)twotoread,theyhaveeachindependentmemoryaddressspace,disposewaytobethesamewithgeneralmemoryofcomputer.Procedure8051memoryand8751sliceprocedurememorycapacity4KB,addressbeginfrom0000H,usedforpreservingtheprocedureandformconstant.Data8051-87518031ofmemorydatamemory128B,addressfalse00FH,useformiddleresulttodepositoperation,thedataarestoredtemporarilyandthedataarebufferedetc..InRAMofthis128B,thereisunitof32bytesesthatcanbeappointedasthejobregister,thisandgeneralmicroprocessorisdifferent,8051sliceRAMandjobregisterrankoneformationthesametoarrangethelocation.ItisnotverythesamethatthememoryofMCS-51seriesone-chipcomputerandgeneralcomputerdisposesthewayinaddition.Generalcomputerforfirstaddressspace,ROMandRAMcanarrangeindifferentspacewithintherangeofthisaddressatwill,namelytheaddressesofROMandRAM,withdistributingdifferentaddressspaceinaformation.Whilevisitingthememory,correspondingandonlyanaddressMemoryunit,canROM,itcanbeRAMtoo,andbyvisitingtheordersimilarly.ThiskindofmemorystructureiscalledthestructureofPrinceton.8051memoriesaredividedintoprocedurememoryspaceanddatamemoryspaceonthephysicsstructure,therearefourmemoryspacesinall:Theprocedurestoresinoneanddatamemoryspaceoutsidedatamemoryandoneinprocedurememoryspaceandoneoutsideone,thestructureformsofthiskindofproceduredeviceanddatamemoryseparatedformdatamemory,calledHarvardstructure.Butusetheanglefromusers,8051memoryaddressspaceisdividedintothreekinds:(1)Intheslice,arrangeblocksofFFFFH,0000Hoflocation,inunisonoutsidetheslice(use16addresses).(2)Thedatamemoryaddressspaceoutsideoneof64KB,theaddressisarrangedfrom0000H64KBFFFFH(with16addresses)tootothelocation.(3)Datamemoryaddressspaceof256B(use8addresses).Threeabove-mentionedmemoryspaceaddressesoverlap,fordistinguishinganddesigningtheordersymbolofdifferentdatatransmissionintheinstructionsystemof8051:CPUvisitslice,ROMorderspendMOVC,visitblockRAMorderusesMOVXoutsidetheslice,RAMorderusesMOVtovisitinslice.8051one-chipcomputerhavefour8walkabreastI/Oport,callP0,P1,P2andP3.Eachportis8accuratetwo-waymouths,accountsfor32pinsaltogether.EveryoneI/Olinecanbeusedasintroductionandexportedindependently.Eachportincludesalatch(namelyspecialfunctionregister),oneexportsthedriverandaintroductionbuffer.Makedatacanlatchwhenoutputting,datacanbufferwhenmakingintroduction,butfourfunctionofpasswaytheseself-same.Expandamongthesystemofmemoryoutsidehavingslice,fourportthesemayserveasaccuratetwo-waymouthofI/Oincommonuse.Expandamongthesystemofmemoryoutsidehavingslice,P2mouthseehigh8addressoff;P0mouthisatwo-waybus,sendtheintroductionof8lowaddressesanddata/exportintimesharingOutputgrade,P3ofmouth,P1ofP1,connectwithinsidehaveloadresistanceofdrawing,everyoneoftheycandrive4ModelLSTTLloadtooutput.Aswhileinputtingthemouth,anyTTLorNMOScircuitcandriveP1of8051one-chipcomputersasP3mouthinanormalway.Becausedrawresistanceonoutputgradeofthemhave,canopenawaycollectortooordrain-sourceresistanceisiturgetoopenaway,donotneedtohavetheresistanceofdrawingouterly.Mouthsareallaccuratetwo-waymouthstoo.Whentheconductisinput,mustwritethecorrespondingportlatchwith1first.Asto80C51one-chipcomputer,portcanonlyoffermilliampereofoutputelectriccurrents,isitoutputmouthgowhenurgingoneordinarybasingoftransistortoregardas,shouldcontactaresistanceamongtheportandtransistorbase,inordertotheelectricitywhilerestrainingthehighlevelfromexportingP1~P3Beingrestoredtothethroneistheoperationofinitializingofanone-chipcomputer.ItsmainfunctionistoturnPCinto0000Hinitially,maketheone-chipcomputerbegintoholdtheconductprocedurefromunit0000H.Exceptthattheonesthatenterthesystemareinitializednormally,asbecauseprocedureoperateitmakemistakesoroperatetherearen'tmistake,inordertoextricateoneselffromapredicament,needtobepressedandrestoredtothethronethekeyrestartingtoo.Itisaninputendwhichisrestoredtothethronethesignalin8051ChinaRSTpin.Restoretothethronesignalhighleveleffective,shouldsustain24shakecycle(namely2machinecycles)theaboveitseffectivetimes.If6offrequencyofutilizationbrillianttoshake,restoretothethronesignaldurationshouldexceed4delicatetofinishrestoringtothethroneandoperating.Producethelogicpictureofcircuitwhichisrestoredtothethronethesignal:Restoretothethronethecircuitandincludetwopartsoutsideinthechipentirely.Outsidethatcircuitproducetorestoretothethronesignal(RST)handovertoSchmitt'strigger,restoretothethronecircuitsampletooutput,SchmittoftriggerconstantlyineachS5P2,machineofcycleinhavingonemore,thenjustgotandrestoredtothethroneandoperatedthenecessarysignalinsidly.Restoretothethroneresistanceofcircuitgenerally,electriccapacityparametersuitablefor6brillianttoshake,canisitrestoretothethronesignalhighleveldurationgreaterthan2machinecyclestoguarantee.Beingrestoredtothethroneinthecircuitissimple,itsfunctionisveryimportant.Piecesofone-chipcomputersystemcouldnormalrunning,shouldfirstcheckitcanrestoretothethronenotsucceeding.Checkingandcanpopone'sheadandmonitorthepinwiththeoscillographtentatively,pushandisrestoredtothethronethekey,thewaveformthatobservesandhasenoughrangeisexported(instantaneous),canalsothroughisitrestoretothethronecircuitgroupholdingvaluecarryontheexperimenttochange.AnothernameofMCSisembeddedmicro-controller,becauseitcanbeembeddedintoanymicro-orsmall-scaleequipmentorequipment.Atpresent,thesingle-chipembeddedsystemsandInternetconnectivityisatrend.However,Internethasbeenusedasafatserver,thinmachinetechnologyusers.ThistechnologyontheInternettostoreandaccesslargeamountsofdataisappropriate,butforcontrolofembeddeddeviceshasbecomethe"sledgehammercrackinganut,"the.EmbeddeddevicestoachieveandInternetconnection,weneedtheInternettothetraditionaltheoryandpracticeofembeddeddevicesarereversed.Inordertomakecomplexorsimpleembeddeddevices,suchassingle-chipmicrocomputer-controlledmachinetools,single-chipmicrocomputer-controlleddoorlocks,canbepracticalandInternetconnection,requiresspecializedequipmentfortheembeddedmicrocontrollerdesignawebservertoembeddevicescanbeconnectedtoInternet,andthroughastandardWebbrowsertoprocesscontrol.Atpresent,inordertosingle-chipmicrocomputerasthecoreofembeddedsystemsandInternetconnectedcompanies,therearemanymorestudiesinthisarea.MoretypicalinthisregardhaveemWareandTASKINGcompany.EmbeddedsystemscompaniesEmWarenetworkprogram-EMITtechnology.Thistechnologyconsistsofthreemainparts:theemMicro,emGatewayandwebbrowser.Which,emMicroembeddeddevicesisa1K-bytememorycapacityaccountedforonlyaverysmallwebservers;emGatewaystrongerasafunctionoftheuserorserver,anditisusedtoachievemorethanthemanagementofembeddeddevices,aswellasstandardaccesstheInternetcommunications,aswellasthesupportofawebbrowser.WebbrowsersusetodisplayandembeddedemObjictsdatatransmissionbetweendevices.Ifsufficientresourcesembeddeddevices,whileatthesametimeemMicroandemGatewayintoembeddeddevices,toachievedirectaccesstotheInternet.Otherwise,itwillrequireawebbrowseremGatewayandeachother.EmWare'sEMITsoftwaretechnologyusingstandardInternetprotocolfor8-bitand16-bitembeddeddevicestomanage,butcostsmuchlesstraditional.Atpresent,single-chipapplications,anewproblem:Thisishowtomakethe8-bit,16-bitsingle-chipmicrocomputertocontroltheproduct,orembeddedproductsorequipmenttoachievetheinterconnectionandtheInternet?TASKINGisnowtosolvethisproblemmeans.ThecompanyhasemWareofEMITsoftwarepackagesandrelatedsupportingintegration,theformationofanintegrateddevelopmentenvironment,toprovideuserswithconvenientdevelopment.EmbeddedInternetUnionETI(embedtheInternetConsortium)istoworkcloselywiththedevelopmentofembeddedInternetsolutions.Resultsinthenearfuturetherewillbepublished.中文譯文51系列單片機(jī)的結(jié)構(gòu)和功能51系列單片機(jī)是英特爾公司生產(chǎn)的具有一定結(jié)構(gòu)和功能的單片機(jī)產(chǎn)品。這家公司在1976年引入8位MCS-48系列單片機(jī)后,于1980年又推出了8位高檔的MCS-51系列單片機(jī)。它包含很多種這類型的單片機(jī),如8051,8031,8751,80C51BH,80C31BH等,它們的基本組成,基本性能和指令系統(tǒng)都是一樣的。一般情況習(xí)慣用8051來代表51系列單片機(jī)。一個單片機(jī)的系統(tǒng)是由以下幾部分組成:(1)一個8位CPU微處理器。(2)靜態(tài)隨機(jī)存取存儲器,能夠儲存程序運(yùn)行過程中產(chǎn)生的數(shù)據(jù)。(3)程序存儲器ROM/EPROM中(4KB/8KB),用來保存程序和一些初始數(shù)據(jù)。但是在一些單片機(jī)中不使用ROM/EPROM中,如8031,8032,80c系列等。(4)4個8排的I/O并行接口P0~P3,每個口可以用作輸入,也可以用作輸出。(5)2個定時器/計數(shù)器,每個定時器/計數(shù)器可設(shè)置計數(shù)用來計數(shù)外部事件,可以設(shè)置成常用的定時方式,并可以根據(jù)計算或結(jié)果控制單片機(jī)的運(yùn)行。(6)五個中斷源控制系統(tǒng)。(7)1個雙向串行I/O口的UART(通用異步接收器/發(fā)送器UART),用于實(shí)現(xiàn)單片機(jī)的串行通信。(8)振蕩器和時鐘產(chǎn)生電路,需要外部電源的石英晶體微調(diào)電路,允許接在12v的振蕩頻率上。上述部分通過內(nèi)部數(shù)據(jù)總線連接。其中,CPU是單片機(jī)的核心,它是單片機(jī)的控制和指揮中心,ALU算數(shù)邏輯運(yùn)算單元可進(jìn)行算術(shù)運(yùn)算和邏輯運(yùn)算,由1個8暫時存儲器,和2個8位的累加器組成。Acc累加器是ALU運(yùn)算結(jié)果的存放單元,一般數(shù)據(jù)通過它來傳送。此外,Acc往往被視為對8051內(nèi)的數(shù)據(jù)傳輸中轉(zhuǎn)站。和通常的微處理器一樣,它是最繁忙的寄存器。有記憶功能并執(zhí)行命令。該控制器包括程序計數(shù)器,可讀寫的存儲器,振蕩器和定時電路等。該程序計數(shù)器是有兩對8或16位計數(shù)器,它是一個字節(jié)地址計數(shù)器,在個人電腦運(yùn)行程序時,執(zhí)行下一個單元的內(nèi)容,程序執(zhí)行時可以改變它的內(nèi)容從而改變運(yùn)行的結(jié)果。在8051芯片震蕩電路中,需要外接石英晶體和微調(diào)電容,其頻率范圍為1.2MHz—12MHz。該脈沖信號,即為8051的工作周期,是最小的時間單位。8051和其他單片機(jī)一樣,都有相同的控制和功能,就像樂隊也有打擊樂器一樣。在8051中有ROM(程序存儲器,只能讀?。?,和RAM(數(shù)據(jù)存儲器,可以讀和寫),他們有各自獨(dú)立的內(nèi)存地址空間,也有相同的處理方式。8051和8751的程序存儲器的存儲容量為4KB,地址從0000H開始,在使用過程中其中的數(shù)據(jù)不變。8051、8751、8031數(shù)據(jù)存儲器的內(nèi)存為128B,默認(rèn)地址是00FH,用于保存中間數(shù)據(jù)和緩存。在這128B的內(nèi)存中,有32byteses,被稱作工作寄存器,和常用的微處理器不同的是,8051的RAM是按功能來劃分模塊的。MCS-51系列單片機(jī)和一般電腦的處理方式不同。一般電腦會自動分配地址空間,ROM和RAM的計算機(jī)可以安排在不同的空間內(nèi),地址范圍會根據(jù)ROM和RAM的位置分配不同地址空間。在訪問的內(nèi)存,不管是ROM和RAM,只有一個地址對應(yīng)一個內(nèi)存單元,都要按這個順序訪問。這種內(nèi)存結(jié)構(gòu)是所謂的普林斯頓結(jié)構(gòu)。8051的存儲器按物理結(jié)構(gòu)劃分可分為程序存儲器空間和數(shù)據(jù)存儲空間,共有四個內(nèi)存空間,按結(jié)構(gòu)位置的不同分為內(nèi)部程序存儲空間、外部程序存儲空間、內(nèi)部數(shù)據(jù)存儲空間和外部數(shù)據(jù)存儲空間。但從用戶的使用角度看,8051存儲器地址空間被分成三類:(1)片內(nèi),安排FFFFH的塊,片外的(使用16個地址)串口0000H地址。(2)外部數(shù)據(jù)存儲器地址空間為64KB,地址是從0000H到FFFFH(含16個地址)的位置排列也。(3)256B的數(shù)據(jù)存儲器(使用8個地址)的地址空間。上述三個重疊的內(nèi)存空間地址,用8051指令系統(tǒng)的傳輸不同的數(shù)據(jù)和使用的功能區(qū)分。CPU的訪問內(nèi)存時,訪問ROM使用MOVC語句,訪問RAM塊順序使用片外操作的MOVX語句,訪問內(nèi)存片段使用MOV語句。8051單片機(jī)有4個8并行的I/O端口,分別為P0,P1,P2和P3。每個端口是8位精確的雙向口,共占了32針。每一個I/O線可作為獨(dú)立的入口和出口。每個端口包括一個鎖存器(即特殊功能寄存器),一個出口驅(qū)動器和引進(jìn)緩沖器。使數(shù)據(jù)能夠鎖存輸出,數(shù)據(jù)可以及時緩沖,其余四個具有相同的功能。接外部存儲擴(kuò)大它們的內(nèi)存時,這四個口就可作為雙向口常用的I/O口,這是,P2口看到高8位地址,P0口是一個公共兩用
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