EDA實(shí)驗(yàn)設(shè)計(jì)參考

1、設(shè)計(jì)一個(gè)帶計(jì)數(shù)使能、異步復(fù)位、帶進(jìn)位輸出的增1六位二進(jìn)制計(jì)數(shù)器，計(jì)數(shù)結(jié)果由共陰極七段數(shù)碼管顯示。libraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entitycounterisport(clk,clk1,en,clr:instd_logic;ledout:outstd_logic_vector(6downto0);scanout:outstd_logic_vector(1downto0);co:outstd_logic);endcounter;architectureaofcounterissignalc

2、nt:std_logic_vector(7downto0);signalled:std_logic_vector(6downto0);signalscan:std_logic:='0'signalhex:std_logic_vector(3downto0);beginprocess(clk)beginif(clk'eventandclk='1')thenifen='1'thenifclr='1'thencnt<=(others=>'0');elseifcnt="00111111&quo

3、t;thencnt<="00000000"co<='1'elsecnt<=cnt+'1'co<='0'endif;endif;endif;endif;endprocess;process(clk1)beginifclk1'eventandclk1='1'thenscan<=notscan;endif;endprocess;ledout<=led;scanout<="10"whenscan='0'else"01&quo

4、t;hex<=cnt(7downto4)whenscan='1'elsecnt(3downto0);withhexselectled<="1111001"when"0001","0100100"when"0010","0110000"when"0011","0011001"when"0100","0010010"when"0101","0000010"

5、;when"0110","1111000"when"0111","0000000"when"1000","0010000"when"1001","0001000"when"1010","0000011"when"1011","1000110"when"1100","0100001"when"1101"

6、;,"0000110"when"1110","0001110"when"1111","1000000"whenothers;enda;Now:2000naiSM1200160011111111單1cJ*iItz飛.Cir口剁去訶m；仙：Xfkrfhx小也7X7*i朗fr4圄1IIIIIIL»w1LJI-1.*nT0Itt聞10»111ywe聞3C；3nOlill0la02111L!ZhlXZh2X2hi.<2Ti2工Xh2曠Zti1X2*h22T11】2Ti2(211y

7、inI0*i曲1$eaa2、設(shè)計(jì)一個(gè)帶計(jì)數(shù)使能、同步復(fù)位、帶進(jìn)位輸出的增1二十進(jìn)制計(jì)數(shù)器，計(jì)數(shù)結(jié)果由共陰極七段數(shù)碼管顯示。libraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entitycounterisport(clk,clk1,en,clr:instd_logic;co,scanout:outstd_logic;ledout:outstd_logic_vector(6downto0);endcounter;architecturertlofcounterissignalcnt:std_logic_vec

8、tor(7downto0);signalled:std_logic_vector(6downto0);signalscan:std_logic;signalhex:std_logic_vector(3downto0);beginprocess(clk)beginif(clk'eventandclk='1')thenifclr='1'thencnt<=(others=>'0');elsifen='1'thenifcnt="00001001"thencnt<="00010000&

9、quot;co<='0'elsifcnt="00011001"thencnt<="00000000"co<='1'elsecnt<=cnt+'1'co<='0'endif;endif;endif;endprocess;process(clk1)beginifclk1'eventandclk1='1'thenscan<=notscan;endif;endprocess;ledout<=notled;scanout<=sca

10、n;hex<=cnt(7downto4)whenscan='1'elsecnt(3downto0);withhexselectled<="1111001"when"0001","0100100"when"0010","0110000"when"0011","0011001"when"0100","0010010"when"0101","0000010"

11、;when"0110","1111000"when"0111","0000000"when"1000","0010000"when"1001","1000000"when"0000","1111111"whenothers;endrtl;3、設(shè)計(jì)一個(gè)帶計(jì)數(shù)使能、異步復(fù)位、同步裝載的可逆七位二進(jìn)制計(jì)數(shù)器，計(jì)數(shù)結(jié)果由共陰極七段數(shù)碼管顯示。libraryieee;useieee.std_logic_11

12、64.all;useieee.std_logic_unsigned.all;entitycounterisport(clk,clks,clr,en,stld,dir:instd_logic;din:instd_logic_vector(6downto0);ledout:outstd_logic_vector(6downto0);scanout:outstd_logic);endcounter;architectureaofcounterissignalcnt:std_logic_vector(6downto0);signalled:std_logic_vector(6downto0);sign

13、alscan:std_logic;signalhex:std_logic_vector(3downto0);beginprocess(clk,clr)beginifclk'eventandclk='1'thenifclr='1'thencnt<=(others=>'0');elseifstld='0'thencnt<=din;elsifen='1'thenifdir='1'thencnt<=cnt+'1'elsecnt<=cnt-'1&#

14、39;endif;endif;endif;endif;endprocess;process(clks)beginifclks'eventandclks='1'thenscan<=notscan;endif;endprocess;ledout<=notled;scanout<=scan;hex<='0'&cnt(6downto4)whenscan='1'elsecnt(3downto0);withhexselectled<="1111001"when"0001",

15、"0100100"when"0010","0110000"when"0011","0011001"when"0100","0010010"when"0101","0000010"when"0110","1111000"when"0111","0000000"when"1000","0010000"w

16、hen"1001","0001000"when"1010","0000011"when"1011","1000110"when"1100","0100001"when"1101","0000110"when"1110","0001110"when"1111","1000000"whenothers;Enda;IIp:i

17、lktFtIcmriltrf此!f"dli|icrJ4、設(shè)計(jì)一個(gè)帶計(jì)數(shù)使能、同步復(fù)位、異步裝載、可逆計(jì)數(shù)的通用計(jì)數(shù)器。計(jì)數(shù)結(jié)果由共陰極七段數(shù)碼管顯示。libraryieee;useieee.stdogic_1164.all;useieee.std_logic_unsigned.all;entitycounterisgeneric(count_value:integer:=9);port(clk,clr,en,load,dir:instd_logic;data_in:inintegerrange0tocount_value;count:outintegerrange0tocount_v

18、alue;ledout:outstd_logic_vector(6downto0);endcounter;architectureaofcounterissignalcnt:integerrange0tocount_value;signalled:std_logic_vector(6downto0);beginprocess(load,clk)beginifclr='1'thencnt<=0;elseifload='1'thencnt<=data_in;elsif(clk'eventandclk='1')thenifen=&#

19、39;1'thenifdir='1'thenifcnt=count_valuethencnt<=0;elsecnt<=cnt+1;endif;elseifcnt=0thencnt<=count_value;elsecnt<=cnt-1;endif;endif;endif;endif;endif;endprocess;count<=cnt;ledout<=notled;withcntselectled<="1111001"when1,"0100100"when2,"0110000&

20、quot;when3,"0011001"when4,"0010010"when5,"0000010"when6,"1111000"when7,"0000000"when8,"0010000"when9,"1000000"when0,"1111111"whenothers;Enda;5、設(shè)計(jì)一個(gè)具有16分頻、8分頻、4分頻和2分頻功能的分頻器LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;USEIEEE.ST

21、D_LOGIC_UNSIGNED.ALL;ENTITYdiv4ISPORT(clk:INSTD_LOGIC;din:INSTD_LOGIC_VECTOR(3DOWNTO0);fout:OUTstd_LOGIC);ENDdiv4;ARCHITECTUREaOFdiv4ISbeginprocess(clk)variablecnt:std_logic_vector(3downto0);beginif(clk'eventandclk='1')thenifcnt="1111"thencnt:="0000"elsecnt:=cnt+'

22、1'endif;ifdin="0000"thenfout<=cnt(3);elsifdin="1000"thenfout<=cnt(2);elsifdin="1100"thenfout<=cnt(1);elsifdin="1110"thenfout<=cnt(0);elsefout<='1'endif;endif;endprocess;enda;6、設(shè)計(jì)一個(gè)正負(fù)脈寬相等的通用分頻器LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;US

23、EIEEE.STD_LOGIC_UNSIGNED.ALL;ENTITYcounterISGENERIC(count_value:INTEGER:=15);PORT(clk,clr,en:INSTD_LOGIC;count:OUTSTD_LOGIC);ENDcounter;ARCHITECTUREaOFcounterISSIGNALcnt:INTEGERRANGE0TOcount_value;SIGNALco:STD_LOGIC;SIGNALcount1:STD_L0GIC;BEGINPROCESS(clk,clr)BEGINIFclr='1'THENcnt<=0;ELSI

24、F(clk'EVENTANDclk='1')THENIFen='1'THENIFcnt=count_valueTHENcnt<=0;co<='1'ELSEcnt<=cnt+1;co<='0'ENDIF;ENDIF;ENDIF;ENDPROCESS;PROCESS(co)BEGINIF(co'EVENTANDco='1')THENcount1<=NOTcountl;ENDIF;count<=count1;ENDPROCESS;ENDa;7、設(shè)計(jì)一個(gè)正負(fù)脈寬可控的4分

25、頻的分頻器libraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entityfen_pinisport(clk:instd_logic;din:instd_logic_vector(1downto0);count:outstd_logic);endfen_pin;architecturebehaveoffen_pinissignalco:std_logic;begincount<=co;process(clk)variablecnt:std_logic_vector(1downto0);beginif(

26、clk'eventandclk='1')thenif(cnt="11")thencnt:="OO"co<=notco;elsif(cnt=din)thenco<=notco;cnt:=cnt+'1：elsecnt:=cnt+'1：endif;endif;endprocess;endbehave;din<=”1DIN<=”0”Din<=”1Din<=”00”8根據(jù)需要設(shè)計(jì)一個(gè)分頻器：可以控制實(shí)現(xiàn)四種分頻形式：第一種：5分頻、第二種：8分頻、第三種：15分頻、第四種：16分頻libr

27、aryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entityfenpinisport(clk:instd_logic;en:instd_logic_vector(1downto0);cout:outstd_logic;ledout:outstd_logic_vector(6downto0);endfenpin;architecturedgnfenpinoffenpinissignalled:std_logic_vector(6downto0);signalhex:std_logic_vector(3downto

28、0);beginprocess(clk)variablecnt:stdogic_vector(3downto0):="0000"beginif(clk'eventANDclk='1')thenif(en="00")thenif(cnt>="0101")thencnt:="0000"cnt:=cnt+'1'endif;cout<=cnt(2);elsif(en="01")thenif(cnt>="1000")thencn

29、t:="0000"cout<='1'elsecnt:=cnt+'1'cout<='0'endif;elsif(en="10")thenif(cnt>="1110")thencnt:="0000"cout<='1'elsecnt:=cnt+'1'cout<='0'endif;elseif(cnt>="1111")thencnt:="0000"els

30、ecnt:=cnt+'1'endif;cout<=cnt(3);endif;endif;endprocess;withenselectled<="0000000"when"00","0001000"when"01","0001110"when"10","1000000"when"11","1111111"whenothers;ledout<=led;enddgnfenpin;9、設(shè)計(jì)

31、一個(gè)M序列發(fā)生器，M序列為“11110101”LIBRARYIEEE;USEIEEE.STD_logic_1164.all;USEIEEE.STD_LOGIC_UNSIGNED.ALL;ENTITYSEQISPORT(CLK:INSTD_logic;FOUT:OUTSTD_logic);ENDSEQ;ARCHITECTUREBEHAVEOFSEQISSIGNALCNT:STD_logic_VECTOR(2DOWNTO0);BEGINPROCESS(CLK)BEGINIFCLK'EVENTANDCLK='1'THENIFCNT="111"THENCNT

32、<="000"ELSECNT<=CNT+'1'ENDIF;ENDIF;ENDPROCESS;WITHCNTSELECTFOUT<='1'WHEN"000",'1'WHEN"001",'1'WHEN"010",'1'WHEN"011",'0'WHEN"100",'1'WHEN"101",'0'WHEN"1

33、10",'1'when"111",'0'WHENOTHERS;endBEHAVE;10、設(shè)計(jì)一個(gè)彩燈控制器，彩燈共有8個(gè)，每次順序點(diǎn)亮相鄰的2個(gè)彩燈，如此循環(huán)執(zhí)行，循環(huán)的方向可以控制libraryieee;useieee.std_logic_1164.all;entitycaidengisport(clk,en,load:instd_logic;ledout:outstd_logic_vector(7downto0);endcaideng;architectureBehavioralofcaidengissignalreg:std_

34、logic_vector(7downto0);beginprocess(clk)beginif(clk'eventandclk='1')thenif(en='0')thenreg<="00111111"elsifload='1'thenreg<=reg(0)&reg(7downto1);elsereg<=reg(6downto0)&reg(7);endif;endif;ledout<=reg;endprocess;endBehavioral;8位串行移位寄存器11、設(shè)計(jì)一個(gè)具有左

35、移、右移控制，同步并行裝載和串行裝載的entityshifterisport(clr:instd_logic;clk:instd_logic;ser:instd_logic;clkin:instd_logic;stld:instd_logic;din:instd_logic_vector(0to7);qh:outstd_logic);endshifter;architecturertlofshifterissignalreg:std_logic_vector(0to7);beginprocess(clk,clr)beginifclr='1'thenreg<=(others

36、=>'0');elsifclk'eventandclk='1'thenifclkin='0'thenifstld='0'thenreg<=din;elsereg<=ser&reg(0to6);endif;endif;endif;endprocess;qh<=reg(7);endrtl;12、設(shè)計(jì)一個(gè)9人表決電路，參加表決者為9人，同意為1，不同意為0，同意者過半則表決通過，綠指示燈亮，表決不通過則紅指示燈亮。數(shù)碼管顯示贊成人數(shù)。libraryieee;useieee.std_logic_11

37、64.all;useieee.std_logic_unsigned.all;entityselectorisport(a:instd_logic_vector(8downto0);r,g:outstd_logic;ledout:outstd_logic_vector(6downto0);endselector;architecturert1ofselectorissignalled:std_logic_vector(6downto0);signalcount:std_logic_vector(3downto0);beginprocess(a)variablecnt:std_logic_vect

38、or(3downto0);begincnt:="0000"foriin0to8loopifa(i)='1'thencnt:=cnt+1;endif;endloop;if(cnt>="0101"andcnt<="1001")theng<='1'r<='0'elsif(cnt>="0000"andcnt<="0100")theng<='0'r<='1'endif;count

39、<=cnt;endprocess;ledout<=notled;withcountselectled<="1111001"when"0001","0100100"when"0010","0110000"when"0011","0011001"when"0100","0010010"when"0101","0000010"when"0110"

40、,"1111000"when"0111","0000000"when"1000","0010000"when"1001","1000000"whenothers;endrt1;仿真波形圖如下:|0.0ni*hlUmF卩q*ml:|1.64'utYatui:,20QJniIUOi3QQ卩rviQUD.DntIQui1I忖*I.JJuiI.EiuiK.Buf2.Du»2.2>Jt2.4utjiiii«lr1aS£ag

41、孟aJajiHiDGOSfSB:嚇J：ee1GO皿XOTJ尸f護(hù)愛OBIdataap.lH11X25§I74籲|如圈玄JOH1'X23I<:一百X6I.T妙53|d亦菲0|rtXKcDC»der|dBtea|3.0MXxH>K13、設(shè)計(jì)一個(gè)同步復(fù)位，異步并行裝載的8位串行左移移位寄存器libraryIEEE;useIEEE.STD_LOGIC_1164.ALL;ENTITYexam13ISPORT(clk,clr,ser,stld:INSTD_LOGIC;din:INSTD_LOGIC_VECTOR(Oto7);qh:OUTSTD_LOGIC);ENDe

42、xam13;ARCHITECTURErt1OFexam13ISSIGNALreg:STD_LOGIC_VECTOR(Oto7);beginprocess(clk,stld)beginifstld='1'thenreg<=din;elsifclk'eventandclk='1'thenifclr='1'thenreg<=(others=>'0');elsif(stld='O')thenreg<=reg(1to7)&ser;endif;endif;endprocess;qh<

43、;=reg(0);endrt1;1時(shí)由共陰14、有16個(gè)開關(guān)，編號(hào)為0到15，編號(hào)0的優(yōu)先級(jí)最高。當(dāng)某一個(gè)撥碼開關(guān)為極七段數(shù)碼管顯示其編號(hào)(可用16進(jìn)制數(shù)顯示，亦可用十進(jìn)制顯示)LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;USEIEEE.STD_LOGIC_UNSIGNED.ALL;ENTITYbhxsISPORT(INPUT:INSTD_LOGIC_VECTOR(15DOWNTO0);LEDOUT:outSTD_LOGIC_VECTOR(6DOWNTO0);ENDbhxs;ARCHITECTURERT1OFbhxsISSIGNALLED:STD_LOGIC_

44、VECTOR(6DOWNTO0);BEGINprocess(INPUT)beginLEDOUT<=LED;IF(INPUT(0)='1')thenLED<="1000000"ELSIF(INPUT(1)='1')thenLED<="1111001"ELSIF(INPUT(2)='1')thenLED<="0100100"ELSIF(INPUT(3)='1')thenLED<="0110000"ELSIF(INPUT(4)=

45、'1')thenLED<="0011001"ELSIF(INPUT(5)='1')thenLED<="0010010"ELSIF(INPUT(6)='1')thenLED<="0000010"ELSIF(INPUT(7)='1')thenLED<="1111000"ELSIF(INPUT(8)='1')thenLED<="0000000"ELSIF(INPUT(9)='1'

46、;)thenLED<="0010000"ELSIF(INPUT(10)='1')thenLED<="0001000"ELSIF(INPUT(11)='1')thenLED<="0000011"ELSIF(INPUT(12)='1')thenLED<="1000110"ELSIF(INPUT(13)='1')thenLED<="0100001"ELSIF(INPUT(14)='1')the

47、nLED<="0000110"ELSIF(INPUT(15)='1')thenLED<="0001110"ENDIF;ENDPROCESS;ENDRT1;Now;SOOniS&i英呦mi1i1i1i1itt1Wnput伯出-i.I；ItTrtJDCO>'lire3122、1X北1弓«1!U5Ja:«J!|I4|1111H3I««*1'mi1'|1DIiI:Sit*1!Lzzzrsd.'.sd.A#.1.1i4剖IE1inminmfi副閘em*

48、i-T-ED"g岸EH1"甜:城加9漲1*11«iIUM1一zzrn和ll|V15、設(shè)計(jì)一個(gè)全自動(dòng)洗衣機(jī)水位控制器。要求：當(dāng)水位超過某一上限值時(shí)，停止加水，啟動(dòng)洗衣機(jī)；當(dāng)水位低于某一下限值時(shí)，加水，停止洗衣機(jī)；否則啟動(dòng)洗衣機(jī)，停止加水。LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;ENTITYxiyijiISPORT(clk,water_high,water_low:INSTD_LOGIC;jiashui,qitong:OUTSTD_LOGIC);ENDxiyiji;ARCHITECTUREstyleOFxiyijiISTYPEst

49、ateIS(just_right,too_high,too_low);SIGNALnow_state,next_state:state;BEGINPROCESS(now_state,water_high,water_low)BEGINCASEnow_stateISWHENjust_right=>jiashui<='0'qitong<='1'IFwater_low='1'THENnext_state<=too_low;ELSIFwater_high='1'THENnext_state<=too_high

50、;ELSEnext_state<=just_right;ENDIF;WHENtoo_low=>jiashuiv='1'qitongv='0：IFwater_low='1'THENnext_state<=too_low;ELSIFwater_high='1'THENnext_state<=too_high;ELSEnext_state<=just_right;ENDIF;WHENtoo_high=>jiashuiv='0'qitong<='1'IFwater_low=

51、'1'THENnext_state<=too_low;ELSIFwater_high='1'THENnext_state<=too_high;ELSEnext_state<=just_right;ENDIF;ENDCASE;ENDPROCESS;PROCESS(clk)BEGINIF(clk'eventANDclk='1')THENnow_state<=next_state;ENDIF;ENDPROCESS;ENDstyle;*|EndI；Su鼻hlHfrtlAZDOrrj200Qg*"D0nft6OJi

52、：MSXOni1OirKJWlurT0Qir沖wq峙聲jiaihcji砂前伽曲01M申腫TlL咱IIJi(£IStifffMArrTvtftttJIM'pLyll£i14£dllliw靜就1KUIiliskm-i£_L>Je*5*1丫卓l>s昇ItpM16、根據(jù)真值表設(shè)計(jì)一位全加器，然后用結(jié)構(gòu)的描述方法設(shè)計(jì)一個(gè)8位加法器ENTITYfull_adderISPORT(a,b,cin:INSTD_LOGIC;s,co:OUTSTDLOGIC);ENDfull_adder;ARCHITECTUREfull_1offull_adderisSI

53、GNALcomb:STD_LOGIC_VECTOR(2downto0);BEGINcomb<=a&b&cin;PROCESS(comb)BEGINIF(comb="000")thens<='0'co<='0'elsif(comb="001")thens<='1'co<='0'elsif(comb="100")thens<='1'co<='0'elsif(comb="010&

54、quot;)thens<='1'co<='0'elsif(comb="011")thens<='0'co<='1'elsif(comb="101")thens<='0'co<='1'elsif(comb="110")thens<='0'co<='1'elses<='1'co<='1'endif;endprocess;e

55、ndfull_1;libraryIEEE;useIEEE.STD_LOGIC_1164.ALL;useIEEE.STD_LOGIC_ARITH.ALL;useIEEE.STD_LOGIC_UNSIGNED.ALL;entityfull_adder8isport(clk:instd_logic;cin:instd_logic;x,y:instd_logic_vector(7downto0);ledout:outstd_logic_vector(6downto0);scan_out:outstd_logic_vector(1downto0);co:outstd_logic);endfull_add

56、er8;architectureBehavioraloffull_adder8iscomponentfull_adderport(a,b,cin:instd_logic;s,co:outstd_logic);endcomponent;signalz:std_logic_vector(6downto0);signalsum:std_logic_vector(7downto0);signalscan:std_logic_vector(1downto0);signalhex:std_logic_vector(3downto0);signalled:std_logic_vector(6downto0)

57、;beginuo:full_adderportmap(x(0),y(0),cin,sum(0),z(0);u1:full_adderportmap(x(1),y(1),z(0),sum(1),z(1);u2:full_adderportmap(x(2),y(2),z(1),sum(2),z(2);u3:full_adderportmap(x(3),y(3),z(2),sum(3),z(3);u4:full_adderportmap(x(4),y(4),z(3),sum(4),z(4);u5:full_adderportmap(x(5),y(5),z(4),sum(5),z(5);u6:full

58、_adderportmap(x(6),y(6),z(5),sum(6),z(6);u7:full_adderportmap(x(7),y(7),z(6),sum(7),co);scan_out<=scan;ledout<=notled;process(clk)beginif(clk'eventandclk='1')thenifscan="10"thenscan<="01"elsescan<="10"endif;endif;endprocess;hex<=sum(7downto4)w

59、henscan="10"elsesum(3downto0);withhexselectled<="1000000"when"0000",-0"1111001"when"0001",-1"0100100"when"0010",-2"0110000"when"0011",-3"0011001"when"0100",-4"0010010"when"

60、0101",-5"0000010"when"0110",-6"1111000"when"0111",-7"0000000"when"1000",-8"0010000"when"1001",-9"0001000"when"1010",-A"0000011"when"1011",-B"1000110"when"1100&q

61、uot;,-C"0100001"when"1101",-D"0000110"when"1110",-E"0001110"when"1111",-F"XXXXXXX"whenothers;endBehavioral;17、設(shè)計(jì)6位二進(jìn)制數(shù)到BCD碼(8421碼)的轉(zhuǎn)換器。結(jié)果由共陰極數(shù)碼管顯示libraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entitytransisp

62、ort(shu:instd_logic_vector(5downto0);scanclk:instd_logic;led_out:outstd_logic_vector(6downto0);scan_out:outintegerrange0to1);endtrans;architecturertloftransissignalyh,yl:integerrange0to9;signalscan:integerrange0to1;signalled:std_logic_vector(6downto0);signaly,hex:integerrange0to63;beginy<=conv_in

63、teger(shu);yh<=1wheny>=10andy<20else2 wheny>=20andy<30else3 wheny>=30andy<40else4 wheny>=40andy<50else5 wheny>=50andy<60else6 wheny>=60andy<64else0;yl<=(y-0)wheny>=0andy<10else(y-10)wheny>=10andy<20else(y-20)wheny>=20andy<30else(y-30)wheny&

64、gt;=30andy<40else(y-40)wheny>=40andy<50else(y-50)wheny>=50andy<60else(y-60)wheny>=60andy<64else0;process(scanclk)beginifscanclk'eventandscanclk='1'thenifscan=1thenscan<=0;elsescan<=1;endif;endif;endprocess;withscanselecthex<=yhwhen1,ylwhenothers;led_out<=

65、notled;scan_out<=scan;withhexselectled<="1111001"when1,"0100100"when2,"0110000"when3,"0011001"when4,"0010010"when5,"0000010"when6,"1111000"when7,"0000000"when8,"0010000"when9,"1000000"when0,&quo

66、t;1111001"whenothers;endrtl;18、設(shè)計(jì)一個(gè)跑馬燈控制器。一共有8個(gè)彩燈，編號(hào)為L(zhǎng)ED0LED7，點(diǎn)亮方式為：先從左往右順序點(diǎn)亮，然后從右往左，如此循環(huán)往復(fù)。LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;USEIEEE.STD_LOGIC_UNSIGNED.ALL;ENTITYlightenISPORT(CLK:INSTD_LOGIC;ledout:OUTSTD_L0GIC_VECT0R(7DOWNTO0);ENDlighten;ARCHITECTUREbOFlightenISSIGNALcnt:STD_L0GIC_VECT0

67、R(3DOWNTO0):="0000"SIGNALled:STD_LOGIC_VECTOR(7DOWNTO0);BEGINPROCESS(CLK)BEGINIF(CLK'EVENTANDCLK='1')THENIF(cnt="1101")THENcnt<="0000"ELSEcnt<=cnt+'1：ENDIF;ENDIF;ENDPROCESS;ledout<=notled;WITHcntSELECTled<="10000000"WHEN"0000&q

68、uot;,"01000000"WHEN"0001","00100000"WHEN"0010","00010000"WHEN"0011","00001000"WHEN"0100","00000100"WHEN"0101","00000010"WHEN"0110","00000001"WHEN"0111","00

69、000010"WHEN"1000","00000100"WHEN"1001","00001000"WHEN"1010","00010000"WHEN"1011","00100000"WHEN"1100","01000000"WHEN"1101","00000000"WHENOTHERS;ENDb;Now：3000naa*i1DC-DII2000113DHMJ-_J11flint冊(cè)仍：anEatiui->dnLi:(sirFiaiiJhi-uXdr.!l)：盯卜u>筋卜曲>.旳卜f爭(zhēng)amt：卜/&t*lm;：firn由：mrv祈可1心!jiIijifl.3i1e2：iAqJimii19、有四路數(shù)據(jù)輸入，每路數(shù)據(jù)為4位二進(jìn)制數(shù)，根據(jù)不同的控制信號(hào)，輸出相應(yīng)的輸入數(shù)據(jù)。同時(shí)用由共陰極七段數(shù)碼管顯示輸出數(shù)據(jù)的路號(hào)。libraryIEEE;useIEEE.STD_LOGIC_1164.ALL;useieee.std_logic_unsigned.all;entityexam27ispor