合眾達(dá)seed-dec2812開發(fā)板程序及原理圖tms320f2812培訓(xùn)

1、SEED TI C2000 培訓(xùn)教材第一部分：介紹什么是數(shù)字信號(hào)處理器 ? Microprocessor (P):一個(gè)多IC處理系統(tǒng)的核心器件2種基本的結(jié)構(gòu):Von Neumann“- 馮.諾依曼Harvard“ 哈弗Von Neumann“:數(shù)據(jù)、代碼共享內(nèi)存空間數(shù)據(jù)、代碼共享內(nèi)存總線Example: Intels x86 Pentium Processor familyHarvard“:數(shù)據(jù)、代碼獨(dú)立存儲(chǔ)空間數(shù)據(jù)、代碼獨(dú)立存儲(chǔ)總線SOC-微控制器 (C) 用來實(shí)現(xiàn)實(shí)時(shí)控制的核以及輸入輸出接口都集成在片上確保在嵌入式應(yīng)用中的高的性價(jià)比幾乎能滿足各類電子產(chǎn)品對(duì)運(yùn)算能力和外設(shè)的要求2種 P 結(jié)構(gòu)

2、 (Von Neumann 和Harvard) 廣泛應(yīng)用于 MicrocontrollersDSP-數(shù)字信號(hào)處理器 類似于微處理器 (p.), 一個(gè)計(jì)算系統(tǒng)的核額外的用來加速復(fù)雜運(yùn)算的外設(shè):硬件乘法器(MPY)算術(shù)運(yùn)算單元(ALU)多總線訪問機(jī)制實(shí)現(xiàn) 2n 次乘法/加法運(yùn)算的硬件移位寄存器典型的DSP算法乘加運(yùn)算的實(shí)現(xiàn)- P使用PC、通用的C代碼編譯器例如 實(shí)現(xiàn)代碼實(shí)例:#include int data4=1,2,3,4;int coeff4=8,6,4,2;int main(void)int i;int result =0;for (i=0;i4;i+)result += datai*co

3、effi;printf(%i,result);return 0;6個(gè)基本操作CPU將要執(zhí)行的操作?設(shè)置指針1指向 data0設(shè)置指針2指向 coeff0讀datai 到內(nèi)核讀coeffi 到內(nèi)核MPY datai*coeffi做加法運(yùn)算修改指針1修改指針2自增;如果 i3 , 返回第三步重復(fù)執(zhí)行3到8 被稱作“6 Basic Operations of a DSP”DSP能夠單周期執(zhí)行完這6個(gè)基本操作P的執(zhí)行過程-機(jī)器/匯編碼AddressM-Code Assembly - Instruction 10: for (i=0;i4;i+)00411960 C7 45 FC 00 00 00 00

4、 movdword ptr i,0 00411967 EB 09 jmp main+22h 00411969 8B 45 FC mov eax,dword ptr i 0041196C 83 C0 01 add eax,1 0041196F 89 45 FC mov dword ptr i,eax 00411972 83 7D FC 04 cmp dword ptr i,4 00411976 7D 1F jge main+47h11: result += datai*coeffi;00411978 8B 45 FC mov eax,dword ptr i 0041197B 8B 4D FC m

5、ov ecx,dword ptr i 0041197E 8B 14 85 40 5B 42 00 mov edx,dword ptreax*4+425B40h 00411985 0F AF 14 8D 50 5B 42 00 imul edx,dword ptrecx*4+425B50h 0041198D 8B 45 F8 mov eax,dword ptr result 00411990 03 C2 add eax,edx 00411992 89 45 F8 mov dword ptr result,eax 00411995 EB D2 jmp main+19h (411969h) 乘加運(yùn)算

6、的實(shí)現(xiàn)-DSP使用DSP硬件平臺(tái)以及Ti的C編譯器來實(shí)現(xiàn)代碼實(shí)例:int data4=1,2,3,4;int coeff4=8,6,4,2;int main(void)int i;int result =0;for (i=0;i4;i+)result += datai*coeffi;printf(%i,result);return 0;DSP的執(zhí)行過程-機(jī)器/匯編碼AddressMCodeAssembly Instruction0 x8000FF69SPM00 x80018D04 0000RMOVLXAR1,#data0 x8003 76C0 0000RMOVLXAR7,#coeff0 x80

7、055633ZAPA0 x8006F601RPT#10 x8007 564B 8781 |DMAC ACC:P, *XAR1+,*XAR7+0 x800910ACADDLACC,PPM0 x800A8D04 0000RMOVL XAR1,#y0 x800B1E81MOVL *XAR1,ACC Example: Texas Instruments TMS320F2812Space : 12 Code Memory ; 9 Data MemoryExecution Cycles : 10 150MHz = 66 ns數(shù)字信號(hào)控制器 (DSC)C:帶有一個(gè)微處理器（P）作為運(yùn)算單元的單芯片微型計(jì)算機(jī)

8、DSC:帶有一個(gè)數(shù)字信號(hào)處理器（DSP）作為運(yùn)算單元的單芯片微型計(jì)算機(jī)結(jié)合DSP優(yōu)越的運(yùn)算能力以及獨(dú)立數(shù)據(jù)、程序存儲(chǔ)結(jié)構(gòu)和外設(shè)，得到最高效的海量運(yùn)算嵌入式實(shí)時(shí)控制解決方案DSC Example: Ti C2000系列DSP第二部分：C2000結(jié)構(gòu)C281x Block Diagram32x32 bitMultiplierSectoredFlashA(18-0)D(15-0)Program BusData BusRAMBootROM2232-bitAuxiliaryRegisters332 bit Timers RealtimeJTAGCPURegister BusR-M-WAtomicALUP

9、IE Interrupt Manager323232EventManager AEventManager B12-bit ADCWatchdogMcBSPCAN2.0BSCI-ASCI-BSPIGPIOC28x CPU Core32-bit 定點(diǎn)DSP 32 x 32 bit MAC2次單周期16 x 16 MAC (DMAC)快速中斷響應(yīng)機(jī)制單周期讀、寫、修改指令8級(jí)流水線，完全避免硬件流水 線沖突向上代碼兼容性Data Bus32-bitAuxiliaryRegisters332 bit Timers RealtimeJTAGCPURegister BusR-M-WAtomicALUPro

10、gram BusPIE Interrupt Manager32x32 bitMultiplierC28x Internal Bus StructureData-write Address Bus (32)Program Address Bus (22)ExecutionR-M-WAtomicALUReal-TimeEmulation&TestEngineProgram-read Data Bus (32)JTAG ProgramDecoderPCXAR0toXAR7SPDPXARAUMPY32x32XTPACCALURegistersDebugRegister Bus / Result Bus

11、Data/Program-write Data Bus (32)Data-read Address Bus (32)Data-read Data Bus (32)MemoryData (4G * 16) Program(4M* 16) StandardPeripheralsExternalInterfacesXT (32) or T/TLMULTIPLIER 32 x 32 or Dual 16 x 16P (32) or PH/PL AH (16)C28x Multiplier and ALU / ShiftersData BusData BusProgram BusALU (32)3232

12、323232AL (16)323216/328/16Shift R/L (0-16)ACC (32)AH.MSB AH.LSBAL.MSB AL.LSB32Shift R/L (0-16)32Shift R/L (0-16)32168/16/32來至于寄存器操作碼數(shù)據(jù)存儲(chǔ)區(qū)操作數(shù)2乘法器結(jié)果操作數(shù)1C28x Pointer, DP and MemoryDP（16bit）訪問65536個(gè)數(shù)據(jù)頁4M以上的數(shù)據(jù)存儲(chǔ)區(qū)DP不能訪問XAR0XAR1XAR2XAR3XAR4XAR5XAR6XAR7ARAUMUXData MemoryMUXDP (16)Data BusProgram Bus6 LSBfro

13、m IR2232XAR15-0=AR7-0XAR31-16F1 F2 D1 D2 R1 R2 EC28x Pipeline流水線自動(dòng)保護(hù)機(jī)制8-stage pipelineF1 F2 D1 D2 R1 R2 EF1 F2 D1 D2 R1 R2 EF1 F2 D1 D2 R1 R2 EF1 F2 D1 D2 R1 R2 EF1 F2 D1 D2 R1 R2 EF1 F2 D1 D2 R1 R2 XF1 F2 D1 D2 R1 R2 XABCDEFGWWWWWWWWE & G Accesssame address R1 R2 E WD2 R1 R2 E WF1: 取指令地址F2: 取指令內(nèi)容D1

14、: 32/16判斷邊界D2: 取指譯碼R1: 操作數(shù)地址R2: 取操作數(shù)E: 指令執(zhí)行W: 寫內(nèi)容回存儲(chǔ)單元HTMS320F2812 Memory MapMO SARAM (1K)M1 SARAM (1K)LO SARAM (4K)L1 SARAM (4K)HO SARAM (8K)Boot ROM (4K)MP/MC=0BROM vector (32)MP/MC=0 ENPIE=0OTP (1K)FLASH (128K)reservedreservedreservedPF 0 (2K)reservedreservedPF 1 (4K)reservedPF 2 (4K)reservedPIE

15、vector(256)ENPIE=1XINT Zone 0 (8K)XINT Zone 1 (8K)XINT Zone 2 (0.5M)XINT Zone 6 (0.5M)XINT Zone 7 (16K)MP/MC=1XINT Vector-RAM (32)MP/MC=1 ENPIE=0reservedreservedreservedData | Program0 x00 00000 x00 04000 x00 08000 x00 0D000 x00 10000 x00 60000 x00 70000 x00 80000 x00 90000 x00 A0000 x3D 78000 x3D 8

16、0000 x3F 80000 x3F A0000 x3F F0000 x3F FFC00 x3F C0000 x18 00000 x10 00000 x08 00000 x00 40000 x00 2000Data | Program128-Bit PasswordCSM: LO, L1OTP, FLASHreserved0 x3D 7C003FF0003FFCC0：數(shù)學(xué)表和功能3FFCC03FFFC0：引導(dǎo)裝載功能3FFFC03FFFFF：復(fù)位向量以及CPU向量表唯一能從內(nèi)部引導(dǎo)ROM操作向量的是位于3FFFC0的復(fù)位向量，他是廠家編程的，指向初始化引導(dǎo)函數(shù)（InitBoot），該函數(shù)用于啟

17、動(dòng)引導(dǎo)操作Code Security Module保護(hù)知識(shí)產(chǎn)權(quán)用戶自定義密碼128bit映射到存儲(chǔ)空間：0 x00 0AE0 0 x00 0AE7寄存器受到EALLOW保護(hù)128-bits = 2128 = 3.4 x 1038 1次/2cycle 猜測所有的密碼需要1.4*10E23 年LO SARAM (4K)L1 SARAM (4K)OTP (1K)FLASH (128K)reserved0 x00 80000 x00 90000 x00 A0000 x3D 78000 x3D 8000128-Bit Passwordreserved0 x3D 7C000 x3F 7FF8 - 0 x3

18、F 7FFFCSM PasswordLocations (PWL)C28x Fast Interrupt Response Manager支持96個(gè)獨(dú)立的中斷直接訪問專用RAM（向量表）自動(dòng)標(biāo)志更新自動(dòng)現(xiàn)場保護(hù)軟件激發(fā)（INTR/TRAP）可屏蔽中斷-順序執(zhí)行非屏蔽中斷/軟立即執(zhí)行28x CPU Interrupt logic28xCPUINTMIFRIER96 Peripheral Interrupts 12x8 = 9612 interruptsINT1 to INT12PIERegisterMapPIE module For 96 interruptsTST0AHALPHPLAR1 (L

19、)AR0 (L)DPST1DBSTATIERPC(msw)PC(lsw)Auto Context SaveC28x / C24x ModesC2xLP Mode 1 1C28x Mode 1 0C27X (default) 0 0Reserved 0 1 OBJMODE AMODEMode BitsCompiler OptionMode TypeC24x patible mode: 允許運(yùn)行C24的代碼(重新編譯過的） 使用C28代碼產(chǎn)生工具C28x mode: 可以使用C28的所有特征編譯手段如果用戶從外存引導(dǎo)就必須是28模式或者C2xLP-v28-v28 -m20-v27Reset Boo

20、tloaderResetOBJMODE=0 AMODE=0ENPIE=0 VMAP=1Boot determined by state of GPIO pinsReset vector fetched from boot ROM0 x3F FFC0XMPNMC=0( puter mode) ExecutionEntry PointH0 SARAMBootloader setsOBJMODE = 1AMODE = 0第三部分：C2000 InterruptC28x 中斷源C28xCORE2個(gè)不可屏蔽中斷/RSNMI14個(gè)可屏蔽中斷 (INT1 INT14)INT1INT2INT3INT4INT5

21、INT6INT7INT8INT9INT10INT11INT12INT13INT14RSNMIC28X 復(fù)位中斷Watchdog TimerRS pin activeTo RS pinRSC28x CoreReset Boot LoaderResetOBJMODE=0 AMODE=0ENPIE=0 VMAP=1M0M1MAP=1Boot determined by state of GPIO pinsReset vector fetched from boot ROM0 x3F FFC0XMPNMC=1(microprocessor mode)Reset vector fetched from

22、XINTF zone 70 x3F FFC0XMPNMC=0( puter mode) ExecutionBootloadingEntry Point Routines FLASH SPIH0 SARAM SCI-A OTPParallel loadNotes:F2810 XMPNMC tied low internal to deviceXMPNMC refers to input signalMP/MC is status bit in XINTFCNF2 registerXMPNMC only sampled at resetBootloader 模式 GPIO pinsF4 F12 F

23、3 F2 1 x x x flash 0 x3F 7FF6,用戶必須已經(jīng)編寫了分支指令重定位程序執(zhí)行 * 0 0 1 0 H0 SARAM 0 x3F 8000* 0 0 0 1 OTP 0 x3D 7800* 0 1 x x 從外部EEPROM調(diào)用SPL_Boot 0 0 1 1 從SCI-A調(diào)用SCI-Boot 0 0 0 0 從GPIO B口調(diào)用Parallel_Boot* Boot ROM software configures the device for C28x mode before jumpReset 引導(dǎo)過程H0 SARAM (8K)FLASH (128K)OTP (2K)

24、0 x3F 7FF60 x3D 78000 x3D 80000 x3F 80000 x3F F0000 x3F FFC0Boot ROM (4K)BROM vector (32)0 x3F FC00Boot CodeRESETExecution Entry Point DeterminedBy GPIO PinsBootloadingRoutines (SPI, SCI-A,Parallel Load)0 x3F FC00C28X 中斷源EV and Non-EVPeripherals(EV, ADC, SPI,SCI, McBSP, CAN)內(nèi)部中斷源外部中斷源XINT1XINT2PDPIN

25、TxRSXNMI_XINT13NMIC28x COREINT1INT13INT2INT3INT12INT14RSPIE (PeripheralInterruptExpansion)TINT2TINT1TINT0IFR中斷標(biāo)志寄存器可屏蔽中斷處理過程101(IFR)“Latch”INT1INT2INT14CoreInterruptC28xCore(INTM)“Global Switch”(IER)“Switch”中斷使能寄存器（INTM以及IER被使能了才能響應(yīng)）中斷標(biāo)志寄存器 (IFR)RTOSINTDLOGINTINT14INT13INT12INT11INT10INT989101112131

26、415INT8INT7INT6INT5INT4INT3INT2INT101234567中斷確定 :IFR Bit = 1中斷未確定 :IFR Bit = 0DINT/EINT，禁止中斷寫IFR時(shí)產(chǎn)生中斷，中斷具有優(yōu)先級(jí)CPU識(shí)別中斷之后IFR由CPU復(fù)位復(fù)位狀態(tài)為0 /* Manual setting/clearing IFR */extern cregister volatile unsigned int IFR; IFR |= 0 x0008;/set INT4 in IFR IFR &= 0 xFFF7;/clear INT4 in IFR中斷使能寄存器 (IER)RTOSINTDLOG

27、INTINT14INT13INT12INT11INT10INT989101112131415INT8INT7INT6INT5INT4INT3INT2INT101234567使能: Set IER Bit = 1禁止: Clear IER Bit = 0DINT/EINT，禁止中斷復(fù)位清零/* Interrupt Enable Register */extern cregister volatile unsigned int IER; IER |= 0 x0008;/enable INT4 in IER IER &= 0 xFFF7;/disable INT4 in IER中斷全局使能INTM用

28、來做全局的使能/禁止中斷:使能:INTM = 0禁止:INTM = 1 (reset value)INTM只能被匯編語言修改:INTMST1 Bit 0/* Global Interrupts */ asm(“ CLRC INTM”); /enable global interrupts asm(“ SETC INTM”); /disable global interruptsPeripheral Interrupt Expansion - PIEPeripheral Interrupts 12x8 = 96IFRIERINTM28xCore28x Core Interrupt logicPI

29、E module for 96 InterruptsINT1.x interrupt groupINT2.x interrupt groupINT3.x interrupt groupINT4.x interrupt groupINT5.x interrupt groupINT6.x interrupt groupINT7.x interrupt groupINT8.x interrupt groupINT9.x interrupt groupINT10.x interrupt groupINT11.x interrupt groupINT12.x interrupt groupINT1 IN

30、T 1212 Interrupts96 INT1.1INT1.2INT1.8101INT1PIEIFR1PIEIER1Interrupt Group 1INT13 (TINT1 / XINT13)INT14 (TINT2)NMIPIE 寄存器INTx.2INTx.3INTx.4INTx.5INTx.6INTx.7INTx.8INTx.10123456715 - 8reservedPIEIFRx register (x = 1 to 12)INTx.2INTx.3INTx.4INTx.5INTx.6INTx.7INTx.8INTx.10123456715 - 8reservedPIEIERx r

31、egister (x = 1 to 12)reservedPIEACKxPIE Interrupt Acknowledge Register (PIEACK)1243567890101115 - 12ENPIEPIEVECTPIECTRL register015 - 1#include “DSP28_Device.h” PieCtrlRegs.PIEIFR1.bit.INTx4 = 1; /manually set IFR for XINT1 in PIE group 1 PieCtrlRegs.PIEIER3.bit.INTx5 = 1; /enable CAPINT1 in PIE gro

32、up 3 PieCtrlRegs.PIEACK.all = 0 x0004; /acknowledge the PIE group 3 PieCtrlRegs.PIECTRL.bit.ENPIE = 1; /enable the PIEPrioVectorOffset復(fù)位時(shí)默認(rèn)中斷向量表Memory0BROM Vectors64 W0 x3F FFC00 x3F FFFFPIE Vectors256 W0 x00 0D00 4 2 3DlogIntRtosIntEmuIntNMI020406080A0C0E10121416181A1C1E2022242628-3E - -IllegalUser

33、 1-12 5 6 7 8 910111213141516171819Int 1Int 2Int 3Int 4Int 5Int 6Int 7Int 8Int 9Int 10Int 11Int 12Int 13Int 14 1Reset00Default Vector TableRemapped whenENPIE = 1PIE vector generated by config ToolUsed to initialize PIE vectorsPIE Vector Mapping (ENPIE = 1)CPU vectors are remapped to 0 x00 0D00 in Da

34、ta spacePIE vector space - 0 x00 0D00 256 Word memory in Data space INT13 0 x00 0D1A XINT1 Interrupt VectorINT14 0 x00 0D1C Timer2 RTOS VectorDatalog 0 x00 0D1D Data logging vector USER11 0 x00 0D3E User defined TRAP INT1.1 0 x00 0D40 PIEINT1.1 interrupt vector INT12.1 0 x00 0DF0 PIEINT12.1 interrup

35、t vectorINT1.8 0 x00 0D4E PIEINT1.8 interrupt vectorINT12.8 0 x00 0DFE PIEINT12.8 interrupt vector PIE vector address PIE vector DescriptionNot used 0 x00 0D00 Reset Vector Never Fetched Here Vector nameINT1 0 x00 0D02 INT1 re-mapped below re-mapped below INT12 0 x00 0D18 INT12 re-mapped below RESET

36、 and INT1-INT12 vector locations are Re-mappedF2812/10 PIE Interrupt Assignment TableINTx.8INTx.7INTx.6INTx.5INTx.4INTx.3INTx.2INTx.1INT1WAKEINTTINT0ADCINTXINT2XINT1PDPINTBPDPINTAINT2T1OFINTT1UFINTT1CINTT1PINTCMP3INTCMP2INTCMP1INTINT3CAPINT3CAPINT2CAPINT1T2OFINTT2UFINTT2CINTT2PINTINT4T3OFINTT3UFINTT

37、3CINTT3PINTCMP6INTCMP5INTCMP4INTINT5CAPINT6CAPINT5CAPINT4T4OFINTT4UFINTT4CINTT4PINTINT6MXINTMRINTSPITXINTASPIRXINTAINT7INT8INT9SCITXINTBSCIRXINTBSCITXINTASCIRXINTAINT10INT11INT12ECAN0INTECAN1INTDevice Vector Mapping - Summary_c_int00: . . .CALL main()main() initialization(); . . .Initialization ( )

38、EALLOW Load PIE Vectors Enable the PIEIER Enable PIECTRL Enable Core IER Enable INTM EDISPIE Vector Table256 Word RAM0 x00 0D00 0DFFRESETReset Vector = Boot-ROM Code Flash Entry Point = LB _c_int00User Code Start MPNMC = 0 (on-chip ROM memory)Reset Vector = _c_int00 User Code Start MPNMC = 1 (extern

39、al memory XINTF)中斷響應(yīng)過程CPU 動(dòng)作描述TST0AHALPHPLAR1AR0DPST1DBSTATIERPC(msw)PC(lsw)寄存器PUSH 堆棧14 個(gè)寄存器被自動(dòng)保存（.） 0 IFR (bit)請(qǐng)IFR位 0 IER (bit)清IER位 1 INTM/DBGM禁止全局中斷/Debug 事件 Vector PC 加載中斷向量表給PC指針 Clear other status bits清 LOOP, EALLOW, IDLESTAT第四部分：C2000 內(nèi)存映射/BOOTROMTMS320F2812 內(nèi)存映射MO SARAM (1K)M1 SARAM (1K)LO

40、 SARAM (4K)L1 SARAM (4K)HO SARAM (8K)Boot ROM (4K)MP/MC=0BROM vector (32)MP/MC=0 ENPIE=0OTP (1K)FLASH (128K)reservedreservedreservedPF 0 (2K)reservedreservedPF 1 (4K)reservedPF 2 (4K)reservedPIE vector(256)ENPIE=1XINT Zone 0 (8K)XINT Zone 1 (8K)XINT Zone 2 (0.5M)XINT Zone 6 (0.5M)XINT Zone 7 (16K)MP

41、/MC=1XINT Vector-RAM (32)MP/MC=1 ENPIE=0reservedreservedreserved數(shù)據(jù) | 程序0 x00 00000 x00 04000 x00 08000 x00 0D000 x00 10000 x00 60000 x00 70000 x00 80000 x00 90000 x00 A0000 x3D 78000 x3D 80000 x3F 80000 x3F A0000 x3F F0000 x3F FFC00 x3F C0000 x18 00000 x10 00000 x08 00000 x00 40000 x00 2000數(shù)據(jù) | 程序12

42、8-Bit Passwordreserved0 x3D 7C00TMS320F2812片內(nèi)ROM MAP段地址0 x3F F000 0 x3F F5010 x3F F502 0 x3F F7110 x3F F712 0 x3F F8330 x3F F834 0 x3F F9E70 x3F F9E8 0 x3F FB4F0 x3F FB50 0 x3F FBFF0 x3F FC00 0 x3F FFBF0 x3F FFC0 0 x3F FFC10 x3F FFC2 0 x3F FFFF程序數(shù)據(jù)空間正弦/余弦; 641 x 32(Q30)規(guī)格化翻轉(zhuǎn); 264 x 32(Q29)規(guī)格化平方根;145

43、 x32(Q30)規(guī)格化ACTAN; 218 x32(Q30)圓整和飽和度. 180 x 32(Q30)保留引導(dǎo)裝載功能，ROM版本復(fù)位向量表; 2 x 16初始化向量; 62 x 16C28x 初始化引導(dǎo)匯編程序Init BootRESET初始化器件:OBJMODE = 1AMODE = 0M0M1MAP = 1DP = 0OVM = 0SPM = 0SP = 0 x00 0400 Dummy Read CSM passwordsCall BootModeSelectExitBootFlash 的啟動(dòng)順序H0 SARAM (8K)0 x3F 7FF60 x3D 80000 x3F 80000

44、 x3F F0000 x3F FFC0Boot ROM (4K)BROM vector (32)0 x3F FC00Boot CodeRESET0 x3F FC00SCAN GPIOFLASH (128K)Passwords (8)_c_int00LBC start routine“rts2800_ml.lib”“user” code sections_c_int00Boot.asmmain ( ) return;23451F2812 Flash Memory MapData & Program SpaceAddress Range0 x3D 8000 0 x3D 9FFF0 x3D A000

45、 0 x3D BFFF0 x3D C000 0 x3D FFFF0 x3E 0000 0 x3E 3FFF0 x3E 4000 0 x3E 7FFF0 x3E 8000 0 x3E BFFF0 x3E C000 0 x3E FFFF0 x3F 0000 0 x3F 3FFF0 x3F 4000 0 x3F 5FFF0 x3F 6000 0 x3F 7F7F0 x3F 7F80 0 x3F 7FF50 x3F 7FF6 0 x3F 7FF70 x3F 7FF8 0 x3F 7FFFSector J ; 8K x 16Sector I ; 8K x 16Sector H : 16K x 16Sec

46、tor G ; 16K x 16Sector F ; 16K x 16Sector E ; 16K x 16Sector D; 16K x 16Sector C ; 16K x 16Sector B ; 8K x16Sector A ; (8K-128) x16 Program to 0 x0000 when using Code Security Mode !Flash Entry Point ; 2 x 16Security Password ; 8 x 1616 or 32 dispatched1664Aligned 64-bit fetch2-level deep fetch buff

47、er64C28x Core decoder unit加速 Flash 執(zhí)行速度流水線Flash Pipeline Enable0 = disable (default)1 = enableENPIPEreserved1501FOPT 0 x00 0A80 CCS編程插件Code Security Module (CSM)受CSM保護(hù)的存儲(chǔ)區(qū)：L0、L1、OTP、Flash在受保護(hù)區(qū)域里面運(yùn)行的程序才能讀寫限制區(qū)的數(shù)據(jù)任何其他的數(shù)據(jù)讀寫都被拒絕:JTAG 調(diào)試, ROM 引導(dǎo), 運(yùn)行在片外或者片內(nèi)非保護(hù)區(qū)的程序LO SARAM (4K)L1 SARAM (4K)OTP (1K)FLASH (12

48、8K)reserved0 x00 80000 x00 90000 x3D 78000 x3D 8000reserved0 x00 A000 0 x3D 7C00CSM RegistersAddress Name Reset ValueDescription0 x00 0AE0 KEY0 0 xFFFF128位KEY寄存器的低位字0 x00 0AE1 KEY1 0 xFFFF128位KEY寄存器的第二個(gè)字0 x00 0AE2 KEY2 0 xFFFF。0 x00 0AE3 KEY3 0 xFFFF。0 x00 0AE4 KEY4 0 xFFFF。0 x00 0AE5 KEY5 0 xFFFF。0

49、 x00 0AE6 KEY6 0 xFFFF。0 x00 0AE7 KEY7 0 xFFFF 128位KEY寄存器的高位字0 x00 0AEF CSMSCR 0 xFFFFCSM 狀態(tài)與控制寄存器Key Registers（EALLOW protected）Address Name Reset ValueDescription0 x3F 7FF8 PWL0 user defined 128位密碼的低位字0 x3F 7FF9 PWL1 user defined。0 x3F 7FFA PWL2 user defined 。0 x3F 7FFB PWL3 user defined 。0 x3F 7F

50、FC PWL4 user defined。0 x3F 7FFD PWL5 user defined。0 x3F 7FFE PWL6 user defined 。0 x3F 7FFF PWL7 user defined128位密碼的高位字PWL in memory reserved for passwords onlyCSM的安全解鎖上電或者復(fù)位的時(shí)候CSM被鎖的CSM的解鎖:對(duì)FLASH的每個(gè)密碼執(zhí)行一次啞讀操作（8次）往8個(gè)KEY寄存器寫入正確的密碼新的Flash器件 (PWL 都是 0 xFFFF):對(duì)PWL進(jìn)行一次讀寫，使得器件工作在非鎖定模式volatile int *CSM=0 x0

51、00AE0；volatile int *PWL=0 x3F7FF8；volatile int tmp;Int I;/啞讀密碼位置8次For (i=0;i 4; 電源級(jí)別 ADCRFDN ADCBGNDADCPWDNADC加電 1 1 1ADC掉電 1 0 0ADC關(guān)閉 0 0 0保留 1 0 x保留 0 1 xADC的低功耗方式1、給ADC模擬電路的其他部分家電前，給參考電路和帶隙電路加電2、ADC完全加電后，需要等待20s，才能進(jìn)行第一次抓換。3、ADC掉電，3位被同時(shí)清除。通過軟件設(shè)置。第五部分：F2812數(shù)字通信接口（SPI/SCI）SPI 模塊特點(diǎn)4個(gè)外部引腳：SPISOMI/SPIS

52、IMO/SPISTESPICLK2種工作模式：主工作模式、從工作模式波特率：125種不同的可編程速率16級(jí)發(fā)送和接受FIFO4種時(shí)鐘配置方法（由時(shí)鐘極性和時(shí)鐘相位控制）不帶相位延遲的下降沿：SPI在SPICLK高有效，SPI在SPICLK下降沿發(fā)送數(shù)據(jù)，上升沿接受數(shù)據(jù)帶有相位延遲的下降沿：SPICLD高有效，SPI在SPICLK的下降沿的前半周期發(fā)送數(shù)據(jù)，下降沿接受不帶相位延遲的上升沿：SPICLK低有效，SPI在SPICLK的上升沿發(fā)送數(shù)據(jù)，下降沿接受數(shù)據(jù)帶有相位延遲的上升沿：SPICLK低有效，SPI在SPICLK的下降沿的前半周期發(fā)送數(shù)據(jù)，下降沿接受數(shù)據(jù)串行外圍接口SPI的工作流程SPI

53、 Shift RegisterSPI Shift RegisterSPI Device #1 - MasterSPI Device #2 - Slave數(shù)據(jù)同步傳輸和接受SPI主設(shè)備提供時(shí)鐘shiftshiftclockSPI 功能框圖SPIRXBUF.15-0SPIDAT.15-0SPICLKSPISOMISPISIMOLSPCLKbaudrateclockpolarityclockphaseC28x - SPI 主模式SPITXBUF.15-0LSBMSBTX FIFO_0TX FIFO_15RX FIFO_0RX FIFO_15SPI 功能框圖SPIRXBUF.15-0SPIDAT.15

54、-0SPICLKSPISOMISPISIMOclockphaseC28x - SPI 從模式SPITXBUF.15-0MSBLSBTX FIFO_0TX FIFO_15RX FIFO_0RX FIFO_15SPI 數(shù)據(jù)格式的調(diào)整可編程數(shù)據(jù)長度116發(fā)送數(shù)據(jù)少于16位時(shí)需要左調(diào)整MSB 先發(fā)送接受數(shù)據(jù)少于16位時(shí)需要右調(diào)整用戶程序屏蔽MSB11001001XXXXXXXXXXXXXXXX11001001SPIDAT - Processor #1SPIDAT - Processor #2SPI-A 寄存器AddressRegisterName0 x007040SPICCRSPI-A 配置控制寄存器

55、0 x007041SPICTLSPI-A 工作控制寄存器0 x007042SPISTSSPI-A 狀態(tài)寄存器0 x007044SPIBRRSPI-A 波特率寄存器0 x007046SPIEMUSPI-A 仿真緩沖寄存器0 x007047SPIRXBUFSPI-A 串行接受寄存器0 x007048SPITXBUFSPI-A 串行發(fā)送寄存器0 x007049SPIDATSPI-A 串行數(shù)據(jù)寄存器0 x00704ASPIFFTXSPI-A FIFO 發(fā)送寄存器0 x00704BSPIFFRXSPI-A FIFO 接受寄存器0 x00704CSPIFFCTSPI-A FIFO 控制寄存器0 x0070

56、4FSPIPRISPI-A 極性控制寄存器SPI-A 控制寄存器SPICCR 0 x007040012765-4reservedSPI CHAR.3-0字長控制位e.g.0000b length = 11111b length = 16SPI SW RESET:在改變配置前清除刺位在重新操作開始前設(shè)置此位 0 = SPI flags reset 1 = normal operationCLOCK POLARITY0 = 上升沿輸出/下降沿輸入1 = 下降沿輸入/上升沿輸出reserved15-83SPI-A 工作控制寄存器SPICTL 0 x00704101215-543reservedCLO

57、CK PHASE0 = no CLK delay1 = CLK delayed 1/2 cycleOVERRUN INT ENABLE0 = 禁止接受溢出中斷（SPISTS.7)1 = 使能接受溢出中斷（SPISTS.7)MASTER/SLAVE0 = slave1 = masterTALK0 = transmission disabled,output pin hi-Zd1 = transmission enabledSPI INT ENABLE0 = disabled1 = enabledSPI-A 波特率寄存器SPIBRR 0 x00704415-76-0reservedSPI BIT

58、RATESPICLK signal =LSPCLK(SPIBRR + 1)LSPCLK4,SPIBRR = 3 to 127,SPIBRR = 0, 1, or 2SPI-A 狀態(tài)寄存器SPISTS 0 x007042764-0SPI INT FLAG (read only)傳輸完成置1如果 SPI INT ENA設(shè)置(SPICTL.0)則置位讀 SPIBRXUF清零RECEIVE OVERRUN FLAG (read/clear only)在SPIRXBUF被讀取之前下一次接受完成則1 如果 OVERRUN INT ENA 被設(shè)置 (SPICTL.4)則中斷請(qǐng)求寫1置0reservedres

59、erved15-8TX BUF FULL (read only) 寫 SPITXBUF置位 載入 SPIDAT 清零5SPI-A FIFO 發(fā)送寄存器SPIFFTX 0 x00704A0TXFFIL2SPIFFENATXFFST0TXFFST3TXFFIENA123456789101112131415TXFFIL0TXFFIL1TXFFIL4TXFFIL3TXFFST1TXFFINTCLRTXFFST2TXFFINTTXFFST4TXFIFOSPIRSTTX FIFO Status (read-only)00000TX FIFO empty00001TX FIFO has 1 word0001

60、0TX FIFO has 2 words00011TX FIFO has 3 words10000TX FIFO has 16 words.TX FIFO Interrupt LevelInterrupt when TXFFST4-0and TXFFIL4-0 matchSPI FIFOEnhancements0 = disable1 = enableTX FIFO Reset0 = reset (pointer to 0)1 = enable operationTX FIFOInterrupt(on match)Enable0 = disable1 = enableTX FIFOInterr