5電子競(jìng)賽系列單片機(jī)msp430f

1、MSP430F5529 Microcontroller WorkshopAgendaIntroduction to the MSP430F5xxx (lab-0)5xx Low Power Mode and PMM/UCS Module (Q?)MSP430 Timer (lab-1)ADC12 introduction (lab-2)Using DMA and Timer to conserve power (lab-3)Port mapping and USCI module (lab-4)MSP430ware (lab-5)MSP430USB and tool set (lab-6)MS

2、P430 Tools, Resources and ConclusionTI Embedded Processing Portfolio32-bit ARMCortex-M3MCUs16-bit ultra-low power MCUsDSPDSP+ARM ARM Cortex-A8 MPUsStellarisARM Cortex-M3MSP430Sitara ARM Cortex-A8& ARM9C6000 DaVincivideo processorsTI Embedded ProcessorsDigital Signal Processors (DSPs)Microcontrollers

3、 (MCUs)ARM-Based ProcessorsOMAPSoftware & Dev. Tools Up to 100 MHzFlash8 KB to 256 KB USB, ENET MAC+PHY CAN, ADC, PWM, SPIConnectivity, Security,Motion Control, HMI,Industrial Automation$1.00 to $8.00300MHz to 1GHz Cache, RAM, ROMUSB, CAN,PCIe, EMAC Industrial computing, POS & portable data terminal

4、s$5.00 to $20.00Up to 25 MHzFlash1 KB to 256 KB Analog I/O, ADCLCD, USB, RFMeasurement,Sensing, General Purpose $0.25 to $9.00300MHz to 1Ghz +AcceleratorCache RAM, ROMUSB, ENET, PCIe, SATA, SPIFloating/Fixed PointVideo, Audio, Voice,Security, Conferencing $5.00 to $200.0032-bit real-time MCUsC2000De

5、lfinoPiccolo40MHz to 300 MHz Flash, RAM16 KB to 512 KB PWM, ADC, CAN, SPI, I2CMotor Control, Digital Power, Lighting, Ren. Enrgy$1.50 to $20.00Ultra Low power DSPC5000Up to 300 MHz+AcceleratorUp to 320KB RAMUp to 128KB ROMUSB, ADC McBSP, SPI, I2CAudio, VoiceMedical, Biometrics$3.00 to $10.00Multi-co

6、reDSPC6000 24.000 MMACSCache RAM, ROM SRIO, EMACDMA, PCIe test & meas, media gateways, base stations$40 to $200.00MSP430 Portfolio + Roadmap 100+ devices2xx-Catalog16 MIPS120 kB Flash8 kB RAM500 nA Standby1.8 3.6V75+ devices1xx-Catalog8MIPS60 kB Flash10 kB RAM1.8 3.6 VG = Value LineF = FlashFR = FRA

7、M100+ devices4xx: LCD 16 MIPS120 kB Flash8 kB RAMLCD Controller, 160 segments1.8 3.6VF23x0The New Generation5xx-6xx25MIPS256 kB Flash16 kB RAM1.8 3.6V 0.9-1.65V (L092)FRAM, USB, RF6xx: LCD Controller160 uA/MIPSProductionDevelopmentDeviceF20 xxF21x1F21x2F22xxF541xF543xAFx42x0Fx42xF44xFx43xFG461xFE42x

8、2F47x4Fx47xF43xF23x0F41xF41x2FR57xxFRAMF550 x/10USBF51x2LightingF53xxGen PurposeF5/663xBGM, CatalogG2xx1F552xUSBCC430RFG2xx28kB, CapTouchI/OG2xx316kB, CapTouch I/OF471xxF438/F439F67xxMeteringAFE2xxMetering AFEF67xxMeteringF5/665x512kB FlashF11xxF12xxF13x-F14xF15x-F16xF23x-F24xF261xF241xL0920.9V Nati

9、ve5xx Generation SummaryUltra-Low Power230 A/MHz1.9 A standby modeWake up from standby in 5 sIncreased PerformanceUp to 25 MHz8 MHz across entire operating range (1.8 - 3.6 V)1.8V ISP flash erase & writeFail-safe, flexible clocking system Innovative FeaturesIntegrated LDO, BOR, WDT+, RTCMulti-channe

10、l DMA supports data movement in standby mode More connectivity: USB, RFAES encryption, RTC on backup batteryUser-defined Bootstrap Loader Industry-leading code density MSP430 Generations1xx2xx4xx5xxBasic Clock SystemBasic Clock System +FLL, FLL +Unified Clock System UCSCore voltage same as supply vo

11、ltageCore voltage same as supply voltageCore voltage same as supply voltageProgrammable Core Voltage with integrated PMM 16-bit CPU16-bit CPU, CPUX16-bit CPU, CPUX16-bit CPUXV2GPIOGPIO w/ pull-up and pull-downGPIOGPIO w/pull-up and pull-down, drive strengthN/AN/AN/ACRC16Software RTCSoftware RTCSoftw

12、are RTC with Basic Timer, Basic Timer + RTCTrue 32-bit RTC w/AlarmsUSARTUSCI, USIUSART, USCIUSCI, USB, RFDMA up to 3-chDMA up to 3-chDMA up to 3-chDMA up to 8-chMPY16MPY16MPY16, MPY32MPY32ADC10,12ADC10,12ADC12ADC12_A4-wire JTAG4-wire JTAG, some devices with Spy-Bi-Wire4-wire JTAG4-wire JTAG and Spy-

13、Bi-WireMSP430 GenerationsCategory2xx4xx5xxCPU Clock (max)16MHz8MHz25MHzActive Current( 3.0V, typical)515uA 1MHz4.2mA 8MHz9.1mA 16MHz600uA 1MHz4.8mA 8MHzN/A290uA 1MHz1.84mA 8MHz 230 uA/MHz8.90mA 25MHz 120KB / 8KB (Flash / RAM)120KB / 8KB (Flash / RAM)256KB / 16KB (Flash / RAM)Wake-up Time From LPM31u

14、s6us5usStandby LPM3 Current0.9 1.1uA1.1 2.5uA1.9uA (RTC, WDT, SVS enabled) LPM4 Current0.1uA0.1uA1.2uA (LPM4) / 0.1uA (LPM4.5)Flash ISP Minimum DVCC2.2V2.7V1.8VPort I/O Interrupt CapabilityP1/P2P1/P2P1/P2 Some devices also P3/P4Prog. Port Pin Drive StrengthN/AN/AAll port pinsProg. Pull-ups / Pull-do

15、wnsAll port pinsN/AAll port pins12-bit A/D Internal Reference Current 500 uA500 uA100 uA*12-bit A/D Active Conversion Current800 uA 800 uA150 uA*Available MCLK SourcesDCO LFXT1XT2 (if available)VLOFLLLFXT1XT2 (if available)FLL LFXT1 / XT1UCS XT2 (if available)VLO REFOAvailable FLL Reference ClocksN/

16、ALFXT1LFXT1, REFO, & XT2 (if present)* 2xx, 4xx ADC12; 5xx - REF & ADC12_AExample: MSP430F5438 Active Mode PowerMaximum efficiency min VCORE & max MCLK12MHz: 150A/MHzImpact of PMM overhead is minimum herePeak ICC still 25MHz XT2Crystal Oscillator400kHz 25MHz FLLFrequency Locked LoopLFXT1Crystal osci

17、llator32768Hz400kHz 25MHzVLOInternal very low power,low frequency oscillator12kHzMODOSCModule Oscillatore.g. for ADC, Flash Controller etc. REFOInternal 32768Hz OscillatorLow Frequency Clock SourcesRange of choices to fit application needsPOWERPRECISIONCOST XTAL1uAHIGHCOMPONENT REFO3uAMEDIUMZERO VLO

18、32MhzVLO (Very LP/LF Oscillator)Very low-power, low-cost alternative for 32kHz crystal in apps that dont require precisionPower draw figures are included in ILPM3, VLOIntroduced on 2xxReference Oscillator Factory calibrated OscillatorAccuracy sufficient for UART Communication (up to 9600 Baud)Curren

19、t Higher then LF Oscillatoralternative to 32kHz crystalModerate frequency tolerance over voltage/tempSimilar to DCO, much better than VLOLess accurate than 32kHz crystalPower draw is higher than crystal or VLOIs the default FLL reference clockWhat Can You Do With REFO?Periodic wakeup for apps in whi

20、ch these are trueDont need crystal accuracyBut need better accuracy than VLOMore cost-sensitive than power-sensitive Can you do RTC?Not really - +/-2% error means +/- 1/2 hour error every dayBut not bad as a walking wounded RTC mode in event of crystal failure!MODOSCInternal oscillator to help autom

21、ate operation of some modulesSubstitute for source clock in Flash moduleNo configuration of fFTG requiredNo Risk of bad programming due to wrong Flash clock Serves as ADC12_As internal oscillator (ADC12OSC) 5MHzNot available to system clocks direct to modulesGenerally for applications in which drift

22、 isnt criticalActivation on demandFlash activates it automatically when programming or erasingADC12 activates it when chosen as conversion clockOscillator Fault / Fail-Safe ModesFault detection (XT1, DCO, XT2)Flag set if oscillator enabled but not operating properly Cristal Oscillator Clocks will sw

23、itch to save backup clockFlags must be reset by software: Not Automatic!Fail-safe modes ensure minimal operation if primary clock source failsFor MCLK/SMCLK/ACLK:If LFXT1 is selected and it fails: reverts to REFOIf HFXT1/XT2 is selected and it fails: reverts to DCODuring an oscillator fault, DCOCLK

24、active even at lowest DCO tap, to provide clock for the CPU5xx FLL OverviewFLL: Adjust DCO frequency in reference to a lower clock source (similar to PLL)Normally the FLL is used as source for the MCLK (CPU)Very flexible scaling of the output frequencySources for Reference: REFO / LFXT1/XT1 / XT2Out

25、put frequency: 100kHz - 32MhzFLL: Selection of Nominal FrequencyFrequencyCycle timeselected:f3:f4:1000 kHz1000 nsec943 kHz1060 nsec1042 kHz960 nsecSelected frequencyf2f3f4f5f6MOD = 19FLL: ModulationUnderstanding the Error of an FLLClock Accuracy: Average stabilityExample for the Lock time of the FLL

26、Shown:1MHz required FrequencyDCO = 943000 MHzDCO+1 = 1037540 MHzClock Error 0.1% after 50 clock cyclesClock Error 12MHz, must increase VCORE to support higher speedUnlock PMM registersSet SVM to minimum threshold for chosen speedChange LDO outputPoll SVM output until voltage OKDisable SVM (if not us

27、ed) and lock PMM registers PMMCTL0_H = 0 xA5; / Open PMM module PMMCTL0 = 0 xA500 + level; / Set VCore SVSMLCTL = SVMLE + (level * SVSMLRRL0);/ Set SVM new Level while (PMMIFG & SVSMLDLYIFG) = 0); / Wait till SVM is settled (Delay) PMMIFG &= (SVMLVLRIFG + SVMLIFG); / Clear already set flags if (PMMI

28、FG & SVMLIFG) while (PMMIFG & SVMLVLRIFG) = 0); / Wait till level is reached PMMCTL0_H = 0 x00; / Lock PMM module registers/ Change DCO speed hereUse of provided Macros and FunctionMSP430 F5xx/6xx Core LibraryMake your life easy by using the provided functions for setting the PMMSetVCoreUp (1); / Ha

29、ndles Vcore upSetVCore (3);SetVCore (3); / Handles Vcore up and downSetVCoreDown (0); / Handles Vcore downAvailable Flags and interrupt sourcesStatus flags from SVS/SVM on low and high side are availableSVS/SVM provides a Delay interrupt flags which shows that the SVS/SVM has settled after a change

30、(easier software handling)Separate Flags for Resets (BOR, POR, PUC) and their sources are available to allow individual power up handlingDifferent system initialization, e.g. RTCPower up System Violation errorPerformance SettingsSVSH, SVSL, SVMH, SVML each operate in fast or slow modes (individually

31、 controllable)“Fast” = continuous operation“Slow” = slower duty cycle driven (switched mode)DefaultSlower response to under-voltageVery fast under-voltage spikes may go uncaught (proper decoupling necessary to catch very fast under-voltage spikes)ModeResponse timeCurrent drawFast1us20uASlow150us / 2

32、00us200nASVS/SVM Performance Control ModeSlow/Fast Mode could be controlled by software or automaticallyDefault is Slow modeIn Automatic mode the operation mode switches between the different performance levels of the SVS/SVMSlow: Switched mode of SVS/SVM (slower reaction)Fast: full-performance mode

33、Manual ModeAutomatic ModePower Considerations of PMM ModesThe default setting (slow mode) gives a high reliability with low power consumption.Applications requiring highest power reliability could switch the SVS into full performance mode - continuous observationApplication less sensitive may switch

34、 off the SVS/SVM to get the lowest possible power consumptionLow Power Modes with LDO switched modeNo high current is required at the LPMDecoupling could buffer all the required current peaksVCORE is increased automatically to give more headroom.For critical application (esp. high Temperature) keep

35、the quality of the Capacitors in mind.Protect from changing the PMM settingsA bit in the SYSCTL registers allows the PMM module to be locked, preventing write accessAfter setting this bit there is no user write access allowed to the PMMSYSCTL |= SYSPMMPE;PMM could still be accessed via the protected

36、 BSL segmentsReset of the PMM protection is only possible with BORF5xx/6xx Core LibraryProvide functions that implement the most common operations using the PMM, UCS, PMAP and Flash modules, such as changing the core voltage to operate at higher frequencies, crystal/clock initialization, mapping por

37、t I/O, and write/erase flash operations. Questions for UCS/PMM/LPMWhats the easiest way to configure your UCS and PMM module? What will UCS do to protect system if external crystal failed? How much current drew by SVSH working in NORMAL mode?MSP430F5529 Block DiagramMSP-EXP430F5529Easy power selectU

38、SB, JTAG, BatteryUSB communicationMicrophoneFiltered PWM audio outputActive, selectable gainHeadphone compatibility2-axis accelerometerDot-matrix LCD (102x64)Integrated backlightAnalog Thumb-wheel 2 x push-button switchesMicro SD CardeZ-FET USB 5 cap touch buttonsRF InterfaceCCxxxx EVMsEZRF I/F (6 &

39、 18- pin)Various IDE optionsFree Integrated Development Environments (IDE) availableCode Composer StudioEclipse-based IDE (Compiler, debugger, linker, etc) for all TI embedded processorsUnrestricted version available for $495Free versions are available!Free 16kB code-limited version available for do

40、wnloadFree, full-featured, 120-day trial version availableOther MSP430 IDE options are available! Learn more IAR Embedded WorkbenchStrong third-party IDE offering with project management tools and editor. Includes config files for all MSP430 devices.Free versions are available!Free 4/8/16kB code-lim

41、ited Kickstart version available for downloadFree, full-featured, 30-day trial version availableMSPGCC Free, Open source, GCC tool chain for MSP430includes the GNU C compiler (GCC), the assembler and linker (binutils), the debugger (GDB)Tools can be used on Windows, Linux, BSD and most other flavors

42、 of Unix.Learn more Code Composer Studio 5.1Available now Unified pricing: Microcontroller & Platinum version will be merged= $445Free versions still available:30-day free evaluation tools (can be extended for 90 additional days)16KB code size limited tools for MSP430Easy upgrade path: CCSv4 users w

43、ith active subscription will receive a free upgrade. Expired users can renew their subscriptionFeatures:Simpler, more intuitive interfaceDynamic Download to reduce initial download size!Introduces TI Resource Explorer (Featuring MSP430ware, StellarisWare & C2000 ControlSUITEIntegrates Grace version

44、1.10Includes CGTv4What is TI Resource Explorerand how it ties inA simple and clean GUI frontend designed to be easily navigable to MSP430ware content3 Main categoriesDevicesDatasheets, users guide, code examples, and grace examples (if applicable)Development ToolsUsers guide, user experience code, d

45、esign files, target boards, programmersLibrariesDriverlib, USB software packageBuild-in automatic keyword filters to only show focused contentsImport, build, and debug projects in a single windowLab_0: Blink a LEDBlink the LED with sample project running on MSP430F5529Red LED blinking!Project-New Pr

46、ojectLab_0 ,Using Project templates to startWhy is the code NOT good enough?Lab_0: Blink a LED _codeAgendaIntroduction to the MSP430F5xxx (lab-0)5xx Low Power Mode and PMM/UCS Module (Q?)MSP430 Timer (lab-1)ADC12 introduction (lab-2)Using DMA and Timer to conserve power (lab-3)Port mapping and USCI

47、module (lab-4)MSP430ware (lab-5)MSP430USB and tool set (lab-6)MSP430 Tools, Resources and ConclusionTimer_AAsynchronous16-Bit timer/counter Continuous,up-down,up count modesMultiple pare registersPWM outputsInterrupt vectorregister for fastdecoding Can trigger DMA transferOn all MSP430sTimer_A Count

48、ing Modes0FFFFh0hCCR0Stop/Halt Timer is haltedUpTimer counts between 0 and CCR00FFFFh0hContinuous Timer continuously counts upUp/Down Timer counts between 0 and CCR0 and 0CCR Count Compare RegisterTimerA Output ModeCompletely automaticIndependent frequencies with different duty cycles can be generat

49、ed for each CCRCode examples on the MSP430 websiteCompletely automaticTimer_A PWM ExampleTESTVccP2.5VssXOUTXINRSTP2.0P2.1P2.2TA2/P1.7P1.6P1.5P1.4P1.3TA1/P1.2P1.1P1.0P2.4P2.3MSP430F11x1CCR0CCR1CCR0CCR1CCR0CCR1CCR2CCR2CCR2Timer_A InterruptsTACCR1 CCIFGTACCR2 CCIFGTAIFGTIMERA1_VECTORTAIVTACCR1, 2 and T

50、A interrupt flags are prioritized and combined using the Timer_A Interrupt Vector Register (TAIV) into anotherinterrupt vectorTACCR0 CCIFGTIMERA0_VECTORThe Timer_A parison Register 0 Interrupt Flag (TACCR0) generates a single interrupt vector:Your code must contain a handler to determine which Timer

51、_A1 interrupt triggeredNo handler requiredTAIV Handler Example#pragma vector = TIMERA1_VECTOR_interrupt void TIMERA1_ISR(void) switch(_even_in_range(TAIV,10) case 2 : / TACCR1 CCIFG P1OUT = 0 x04; break; case 4 : / TACCR2 CCIFG P1OUT = 0 x02; break; case 10 : / TAIFG P1OUT = 0 x01; break; 0 xF814 ad

52、d.w &TAIV,PC0 xF818 reti 0 xF81A jmp 0 xF8240 xF81C jmp 0 xF82A0 xF81E reti0 xF820 reti 0 xF822 jmp 0 xF8300 xF824 xor.b #0 x4,&P1OUT0 xF828 reti0 xF82A xor.b #0 x2,&P1OUT0 xF82E reti0 xF830 xor.b #0 x1,&P1OUT0 xF834 retiIAR C codeAssembly codeSource TAIV ContentsNo interrupt pending 0TACCR1 CCIFG02

53、hTACCR2 CCIFG 04hReserved06hReserved 08hTAIFG0AhReserved0ChReserved0Eh0TAIV15xxxx000000000000Timer_B vs Timer_ADefault function identical to Timer_A 8, 10, 12, or 16-bit timer or counter (16-bit only for Timer_A)Outputs double-buffered for simultaneous loadingCCRx registers can be grouped for simult

54、aneous updatesTri-state function from external pinLab_1: Breathing LEDs_TimerA PWM Repeated Increasing/decreasing LED brightness by adjusting PWM duty cycles.LED1 and LED2 breathingT2 :RATIO = ? When MLCK=8MhzT3 : How to configure TimerA togenerate auto 2-CH identical PWMs? T4 : How to configure Tim

55、erA togenerate auto 2-CH reverse PWMs? Lab_1: Breathing LEDs_TimerA PWMT1 :How to select IO functions?AgendaIntroduction to the MSP430F5xxx (lab-0)5xx Low Power Mode and PMM/UCS Module (Q?)MSP430 Timer (lab-1)ADC12 introduction (lab-2)Using DMA and Timer to conserve power (lab-3)Port mapping and USC

56、I module (lab-4)MSP430ware (lab-5)MSP430USB and tool set (lab-6)MSP430 Tools, Resources and ConclusionADC12_A Features12-bits, SAR, 200 ksps+Timer_A/B, software triggersUp to 12 external inputConversion Modes:SingleSequence Repeat-singleRepeat-sequenceInternal/external reference16 conversion result

57、storageInput range: Vss Vref ADC12_A EnhancementsVREF settling time 75us vs. 17msTighter temp coefficient on internal reference 50ppm vs. 100ppmLower power modes Selectable speed vs powerADC12_A core is only enabled when neededHigher clock dividers for faster system clocks 6x lower current than ADC1

58、2150uA for ADC active100uA for 2.5V VREF active46ADC12 Temperature & Vcc SamplingOn-chip temperature sensor channelOn-chip Vcc/2 channel The temperature sample period 30 usTemp sensor offset voltage is large and must be calibrated2-point calibration data insideFactory Application DataADC12 Conversio

59、n Memory & ControlEach memory register is configurableEOSx Identifies the end of a sequence-of-conversions. When the conversion result is written into the EOS ADC12MEMx register, the interrupt will be triggered. SREFx Selects the reference (internal, external, etc)INCHx Selects input channel for the

60、 ADC12MEMx register Input channels can be mixed for a sequence-of-conversionsADC12 Interrupt ControlPower optimization: Currently:Polling for ADC12MEM1IFGOptimization: Enable ADC12MEM1IFG interrupts & wake CPU only to handle conversion data ADC12 Interrupt Enable (ADC12IE) bits enable interrupt requ