計算機組成原理題庫

are(A.Transistors,SMI,Laserdevice,OpticalB.VacuumTubes,Transistors,SSI/MSIcircuit,LaserC.VacuumTubes,Digitaltube,SSI/MSIcircuit,LaserD.VacuumTubes,Transistors,SSI/MSIcircuit,LSI/VLSI include(A.Arithmetic B. C. D. B.MFLOPSisaperformanceindexforexpressthespeedofprocessingthefloatingpointnumber. B.Althoughcomputerscienceandtechnologyhavechangedtremendouslybothinhardwareandinsoftware,thebasicmodelforcomputershasremainedessentiallythesame,whichwaspresentedby().A. B.Von C. D.In8- putersystem,multiplicationanddivisionarerealizedby(A.dedicated B. C. D.Softwareisequivalenttohardwareinlogic B.Resourcesmanagementofcomputersoftwareandhardwareisthedutyof(A.Operating B.LanguageprocessC.DatabaseManagement D.ApplicationThereasonofbinaryrepresentationforinformationinacomputerisitcaneasilyprocessthe B.ThebasicfeatureofVonann is(A.accessmemorybyaddressandexecuteinstructioninB.accessmemorybyC.MultipleInstructionStreamSingleDataStreamD.operateDataandinstructionsarestoredin()whentheprogramisA. B. C. D.operatingTheoperatingsystemisappearedin(A.the4thgeneration B.the2ndgenerationC.the3rdgeneration D.the1stgenerationThesocalled“PC”belongsto(A.Medium B. Computerhardwareconsistsofcalculator,memory,controllerandI/O B.()isnotbelongedtosystemA.Database B.Operating C.Compiler D.theaboveThevastmajorityofcomputersystemsusedtodayareconstructedon()computerA.in B. C. D. Theuseof )signifiedthedevelopment A. B. C. D.Theuseofmicroprocessorsignifiedthedevelopment B.Thereason representationiswidelyadoptedincomputeris(A.computingspeed B.convenienceforinformationC.saving D.therestrictionofthenatureofphysical of(A.hostand B.calculator,memoryandC.hostand D.hardwareandsoftware I/O B. computer model,instructionsanddataareall memory,and B. purchased, B. Mnemonic(助記符):①Assemblylanguage;②machinelanguage;③High-levellanguage;Operatingsystemprimitives;⑤RegularA.①, B. C. D. terminology, B.If[X]2’scomplement=0.1101010，then[X]sign-magnitude A. B. C. D. A.1’s B.unsigned C.2’s D.sign10011011truevalueofdecimalformare_-101 and Thesign-magnituderepresentationof‘0’is 1signbit,overflowmustoccurwhen A.carrysignalisgeneratedfromthesignB.XORoperationforcarrysignalgeneratedfromthesignbitandcarrysignalgeneratedfromthehighestnumericalbitis‘0’C.XORoperationforcarrysignalgeneratedfromthesignbitandcarrysignalgeneratedfromthehighestnumericalbitis‘1’D.XORoperationforcarrysignalgeneratedfromthesignbitandcarrysignalgeneratedfromthehighestnumericalbitis‘1’Therangeofrepresentationfora1’scomplementnumbersystemof64bits(includingthesignbit)is().A.0≤|N|≤263– B.0≤|N|≤262– C.0≤|N|≤264– D.Fixedpointnumbercanbeclassifiedintopuredecimal(純小數(shù)andpureinteger(純整數(shù) Infixedpointcalculator,whetheradopteddoublesignbitorsinglesignbit,itmusthas(),whichisoftenimplementedby().A.Decodingcircuit,NAND B.encodingcircuit,NC.overflowdetectioncircuit,X D.shiftcircuit,AND-Arithmeticshift2’scomplementofapositive,signbitremainsunchanged,andtheblankbitin‘0’.Arithmeticleftshift2’scomplementofanegative,signbitremainsunchanged,andthelowbitfills0.Arithmeticrightshift2’scomplementofanegative,signbitremainsunchanged,andthehighbitfills1,andtruncatlowbit.Letthewordlengthis8,thefixedpointintegerwith2’scomplementrepresentationof-1 Infixedpointoperation,itwillbeoverflowwhentheresultexceedstherepresentrangeofthe Fora8-bit2’scomplementrepresentationintegernumber,itsminimalvalueis-128,itsalvalueis127.A Therangeofrepresentationfora2’scomplementnumbersystemof16bits(includingthesignbit)is().A.-215~+(215- B.-(215–1)~+(215 C.-215~+ D.-(215+1)~+8-4-2-1BCDcodeofanumberis011110001001，thenitstruevalueis Theaddition/subtractionalgorithmforsignmagnituderepresentationisrather WhichofthefollowingnumbersisoddA. B. C. D.Thenumberrepresentedinthecomputersometimeswillbeoverflow,thefundamentalreasonisthelimitedcomputerwordlength. calculator, through A.2’scomplementbinary B.2’scomplementbinaryC.signmagnitudedecimal D.signmagnitudebinaryIn2’scomplementaddition/subtraction,using2signbitsforoverflowdetection,whenthe2signbits‘S1S2’equals‘10’,itmeansthat().A.resultispositive,withno B.resultisnegative,withnoC.resultis D.resultisThe2’scomplementrepresentationof-127is10000000. Theminimalnumberofthefollowingnumbersis A. B. C. D.2’scomplementrepresentationof‘0’equalsto1’scomplementrepresentationof‘- If[X]2’scomplement=1.1101010，then[X]sign-magnitude=A. B. C. D.Forsignmagnituderepresentation,1’scomplementrepresentation,2’scomplementrepresentation,_signmagnituderepresentationand1’scomplementrepresentationhas2representationsof‘0’.Theuseof2’scomplementoperationisadoptedtosimplifythedesignof Fixedpointcalculatorisusedfor A.fixedpoint B.floatingpointC.fixedpointoperationandfloatingpoint D.decimalWhen-1<x<0,[x]sign-magnitude=A.1- B.(2-2-n)- C. D.Thealnumberofthefollowingnumbersis(A.B.C.D.8-4-2-1codeisbinary Adecimalnumberis137.5,thenitsoctalformis ,itshexadecimalform Fora8-bit1’scomplementrepresentationintegernumber,itsminimalvalueis_-127,itsalvalueis127.The（）representationof‘0’isA.signmagnitudeand1’sB.1’sC.2’sD.sign is0 ~65535 Given【x12’scompl=11001100【x2】signmag=1.0110,thedecimalvalueofx1andx2 and- Calculatorhasmanycomponents,butdatabusisthekey B.Inanadder,thecarrygeneratevariable(G)ofbit‘i’is(A.B.C.D.Thecarrylook-aheadcircuitchip74182realizesthecarrylogicbetweengroupsin B.Thesubtractionalgorithmoffixedpointbinaryisrealizedby(A.subtractionforsignmagnitudeB.additionforbinarycodeC.additionfor2’scomplementD.subtractionfor2’scomplementThemainfunctionofALUis(A.arithmeticB.onlyadditionC.logicD.logicandarithmeticInaripple-carryadder,thekeyfactoraffectingthespeedoftheadderis(A.GaevelB.speedofC.variousspeedofeachfulladderforbitD.carrypropagationAcalculatorconsistsofmanycomponents,butthekeycomponentofcalculatoris(A.arithmeticandlogicB.dataC.accumulateD.multi-Anarithmetic-logicunitistheheartoftheCPU,anditbelongsto(A.B.C. D. ThecommercialALUchip74181isa4-bitparalleladderwithcarrylook-ahead B.ALUusuallyhasaripple-carryadderinordertoimprovethe B.Thecommercial4-bitALUchip74181canonlyperform16differentarithmetic B.4-bitArithmeticLogicUnit74181canperform(A.16possiblelogicB.16differentarithmeticC.4-bitmultiplication/divisionD.16differentarithmeticoperationsor16possiblelogicALUbelongsto(A.calculatorB.controlC.D.Usingfour74181ALUchipsandone74182CLAchipcanachievethefollowingcarrypropagationcircuit:().A.carrylook-aheadofall16B.ripplecarryinsideeach4-bitgroupandcarrylook-aheadacrossdifferentC.ripple-carryD.carrylook-aheadinsideeach4-bitgroupandripplecarryacrossdifferentExponentunitinfloatingpointcalculatorcanrealizeaddition,subtraction,multiplicationanddivisionoperations. Inaddition/subtractionoperationontwofloatingpointnumbers,x＝Mx·2Exandy＝My·2Ey,itrequiresexponentequalizationbeforearithmeticoperation.IfEx>Ey,shiftMy;ifEx<Ey,shift_Mx;ifEx=Ey,noshift.Themantissaoffloatingpointnumberuses2’scomplementrepresentation,thebinarycodeofthemantissabeforenormalizationis1.10101.Itneeds_left_normalization,anditshouldshift_1_bit.問題4 )representationisusedinmantissaoffloatingpointA.biasedcodeorexcess-2q B.signC.2’s D.1’sIntherepresentationoffloatingpointnumbers,（ ）isimplicit(隱含) B.theradixofthenumbersystemtorepresentthemantissaC. D.signForaIEEE754standardFloating-Pointnumber,itsmantissauses )A.biasedcodeorexcess-2q B.1’sC.sign D.2’sWhichofthefollowingsisA.Exponentunitcanrealizeaddition,subtraction,multiplicationanddivisionB.MantissaunitonlyrealizemultiplicationandsubtractionC.ExponentunitonlyrealizeadditionandsubtractionforD.FloatingpointcalculatorcanbeimplementedbyexponentandmantissaThealpositivenumberinIEEE754standardfor32-bitsformatisA.+（2–2- B.+（2–2-C.+（1–2- D.2+127+Exponentunitinfloatingpointcalculatorcanrealizeoperationsofaddition,subtractionand WhichisnormalizedFloating-Pointnumber,ifitsmantissaisrepresentedby2’scomplementA. B. C. D.InIEEE754standard,afloatingpointnumberiscomposedofsignbits,exponente,andmantissa Thesignbit‘1’ofabiasedcodenumberrepresentsthenumberfor非負數(shù)_,while‘0’representsthenumberfor負數(shù) InIEEE754standardfloatingpoint,mantissaiscodedas原碼exponentiscodedas_移碼InIEEE754standard,thevalueofexponentisrepresentedinexcess-128 Inaalgorithmfornormalizedfloat-pointnumber,anumberis25×1.10101,with2’scomplementrepresentationformantissa.Thenit( A.needsleftshift2bitsofmantissafornormalized B.needsleftshift1bitofmantissaforC.needsno D.needsrightTheexponent,E,ofafloatingpointnumberusuallyusesbiasedcoderepresentation,whichismoreconvenientforcomparingsizeorexponentequalization. ThemantissaofaFloating-Pointnumberisrepresentedby2’scomplement,thenwhethertheFloating-Pointnumberisnormalizedisdecidedby( A.mantissa’ssignbitand bitofmantissa’snumericalpartareB.thesignbitofexponentandmantissaareC.mantissa’ssignbitand bitofmantissa’snumericalpartareD.thesignbitofexponentandmantissaareIntherepresentationoffloatingpointnumbers, isimplicitandinvisibletothecomputerhardware.Thepurposeofusingnormalizedfloatingpointnumberis A.toexpandtherangeofdata B.toavoidforC.convenientforfloatingpoint D.to umaccuracyof )representationisusedinexponentofFloating-PointA.biasedcodeorexcess-2q B.1’sC.sign D.2’s 問題2 A. B.Register-Register(RR) (RS)addressing A. B. is（A.toperformarithmeticandlogicB.tomovedatabetweenI/OandC.tomovedatabetweenmemoryandD.tochangetheprogramexecuting operand,theinstructionsetusuallysupportsSSaddressing A. B. 問題7FormatandfunctionofinstructionsetonlyaffectthehardstructureofaA. B. mode, in(A.B.C.D.general register, called（A.registerdirectaddressingB.directaddressingC.indirectaddressingD.registerindirectaddressing partina programcontrolinstructionrepresentstheaddress A. B. is().A.registeraddressingB.directaddressingC.indirectaddressingD.immediateaddressing arithmeticoperationbetweentwooperandsone-addressinstruction,one instruction,anotheroperand by().A.immediateaddressingB.impliedaddressingC.stackaddressingD.indirectaddressing mode, can(A.reducetheinstructionlength,expandaddressingspace,improveprogrammingB.realizeprogramstoreandprogramC.accessexternalstorageD.extendOPcodeanddecreasethetroubleofinstruction instructions,addressing isless A. B.Therearetwoinstruction modes,one sequential,and jump.Jump perform().A.conditionalbranchofB.conditionalorunconditionalbranchofC.unconditionalbranchofD.stack is（A.tokeepthelengthofinstructions,whileincreasetheaddressingB.toincreasethelengthofC.tokeepthelengthofinstructions,whileincreasethekindsofinstructionD.toreducethelengthof time（A.ProgramcontrolB.RSC.SSD.RR instruction,then adopts().A.immediateaddressingB.indirectC.registerdirectaddressingD.directaddressing A. B. A. B.Accordingtoterationmodeofcontrolsignal,controllercanbedividedinto_硬布線控制 and微程序控制器Countercanbeusednotonlyforcountingpulse,butalsousedforfrequencydivider(分頻)and Thefunctionofdirectbranchinstructionistotransfertheaddresscodeofinstructioninto A. B. C.address D.Statusregisterstoretheresultofarithmetic InCPU,decoderisusedfordecodeofinstruction,addressingmodeandaddressof Thespeedofacomputerisrelatedtofrequency,andisalsorelatedtowordlength,computerarchitecture,etc. WhichofthefollowingstatementsforRISCiscorrect: A.RISCmustbepipelineB.RISCisnotnecessarypipelineC.RISChascomplexinstructionD.CPUusesfewergeneralInacomputer,memoryandregistersclstoredata ThecycleofCPUfrequencyis（A.machine B.read/write C.clock D.instructionACPUconsistsof（A.controller,ALUand B.C.calculatorand D.controller,ALU,registersandInCPUtheregisterpointingtothenextinstructiontobefetchedis(). InCPU,theregisterforpointingthenextinstructionis ThebitslengthofregistersinCPUisdecidedby（A.instruction B.machineword C.memory D.pinsofAninstructioncycleiscomposedofsomeT Controllerimplementationbyhardwireisalsocalled（A.storelogic B.C.combinationallogic D.microprogrammedIn80486isa32bitsprocessor,whilePentiumis（）bits ACPUatleasthas6kindsofregister,whichareIR,PC,MAR,_MBRgeneralregisterandstatusregister.PC(programcounter)belongsto(A. B. C. D.InCPU,theregisterstoringthecurrentinstructionbeingexecutedisIR，pointingtothenextinstructiontobefetchedisPC.Generally,serialregisterhasthefunctionofshift Theregisterusedtostorethecurrentinstructionbeingexecutedis InCPU,registerMARisusedtostorethememoryaddressduringREAD/WRITEoperations.RegisterSRisusedtostorethestatusbitsastheresultofexecutionofarithmetic,logicandtestinginstruction.CPUdoesnotincludes(A. B.address C. D.instructionIfthefrequencyofacomputeristhehighest,thenitsspeedisthe Foran-bitCPU,nmeans數(shù)據(jù)邏輯總線數(shù)為 問題Whichunitisresponsiblefordecode(A DInmicroprogrammedcontroller,controlunitsendcontrolsignalstoexecuteunit,thecontrolsignalsarecalled()A.micro B.micro C.micro D.microEaachineinstructionisinterpretedandexecutedbyamicrocodeconsistingofasequenceofA. B.Thefunction(s)ofcontrolunitis(are)(A.tofetchaninstructionfrom B.todecodetheOPcodeofanC.togeneratesequentialDtofetchinstructionfrommemoryanddecodeandgeneratecorrespondingcontrolsignalsandTheinstructioncycleforalltheoperationsisthesameA.對B.錯Mutuallyexclusivemicro-operationsaretheoperationsthatcannot executeparallelinaCPUA. B.Inmicroprogrammedcontroller,therelationshipbetweenmachineinstructionandmicroinstructionisA.eaachineinstructionisinterpretedandexecutedbymicro-programwhichconstitutessomemicroB.amicroinstructioniscomposedofsomemachineC.eaachineinstructionisexecutedbyonemicroD.aprogramconstitutesofsomemachineinstructionscanbeimplementedbyamicroCPUcycleisalsocalledclockcycle.ACPUcycleconsistsofsomemachinecyclesA.對B.錯 mandsofamicro-instructionismutuallyexclusive,then().A.theyarefault-tolerance B.theycanreplaceeachotherC.theycanappearinthesametimeD.theycannotappearinthesameProcesseradoptsmicroprogrammedcontrolleriscalledmicroA對B.InstructioncycleisthetimethatCPUfetchesaninstructionfrommemoryandexecutesitA.對B.錯誤Everyinstructioncycleneedsatleast2CPUA.對B.Micro-programutilizessoftwaremethodtodesignthecontrolA. Instructioncycleis（A.thetimeforreadingandexecutinganB.th