




版權(quán)說(shuō)明:本文檔由用戶提供并上傳,收益歸屬內(nèi)容提供方,若內(nèi)容存在侵權(quán),請(qǐng)進(jìn)行舉報(bào)或認(rèn)領(lǐng)
文檔簡(jiǎn)介
1、ECE 663MOSFETsECE 663A little bit of history.SubstrateChannelDrainInsulatorGateOperation of a transistorVSG 0 n type operationPositive gate bias attracts electrons into channelChannel now becomes more conductive More electronsSourceVSDVSGSubstrateChannelDrainInsulatorGateOperation of a transistorTra
2、nsistor turns on at high gate voltageTransistor current saturates at high drain biasSourceVSDVSGSubstrateChannelDrainInsulatorGateSourceVSDVSGStart with a MOS capacitorECE 663MIS Diode (MOS capacitor) Ideal WQuestionsWhat is the MOS capacitance? QS(yS)What are the local conditions during inversion?
3、yS,crHow does the potential vary with position? y(x) How much inversion charge is generated at the surface? Qinv(x,yS)Add in the oxide: how does the voltage divide? yS(VG), yox(VG)How much gate voltage do you need to invert the channel? VTHHow much inversion charge is generated by the gate? Qinv(VG)
4、Whats the overall C-V of the MOSFET? QS(VG)ECE 663ECEFEVEiIdeal MIS Diode n-type, Vappl=0Assume Flat-band at equilibriumqfSECE 663Ideal MIS Diode n-type, Vappl=0ECE 663Ideal MIS Diode p-type, Vappl=0ECE 663Ideal MIS Diode p-type, Vappl=0ECE 663AccumulationPulling in majority carriers at surfaceECE 6
5、63But this increases the barrier for current flow !n+ p n+ECE 663DepletionECE 663Need CB to dip below EF. Once below by yB, minority carrier density trumps the intrinsic density. Once below by 2yB, it trumps the major carrier density (doping) !InversionyBECE 663Sometimes maths can helpECE 663P-type
6、semiconductor Vappl0Convention for p-type: y positive if bands bend downECE 663Ideal MIS diode p-typeCB moves towards EF if y 0 n increases VB moves away from EF if y 0 p decreases ECE 663Ideal MIS diode p-typeAt the semiconductor surface, = ss s 0 depletion of holess =B - intrinsic concentration ns
7、=ps=ni s B Inversion (more electrons than holes) ECE 663Surface carrier concentrationECEFECE 663Want to find , E-field, Capacitance Solve Poissons equation to get E field, potential based on charge density distribution(one dimension)EEEECE 663Away from the surface, = 0andECE 663Solve Poissons equati
8、on:E = -dy/dxd2y/dx2 = -dE/dx = (dE/dy).(-dy/dx) = EdE/dyEdE/dyECE 663Do the integral:LHS:RHS:Get expression for E field (d/dx):Solve Poissons equation:ECE 663Define:Debye LengthThen:+ for 0 and for 0E 0y 0E 2yB Questions What is the MOS capacitance? QS(yS) What are the local conditions during inver
9、sion? yS,crHow does the potential vary with position? y(x) How much inversion charge is generated at the surface? Qinv(x,yS)Add in the oxide: how does the voltage divide? yS(VG), yox(VG)How much gate voltage do you need to invert the channel? VTHHow much inversion charge is generated by the gate? Qi
10、nv(VG)Whats the overall C-V of the MOSFET? QS(VG)ECE 663Charges, fields, and potentialsCharge on metal = induced surface charge in semiconductorNo charge/current in insulator (ideal)metalinsulsemiconductordepletioninversionECE 663Electric FieldElectrostatic PotentialCharges, fields, and potentialsEC
11、E 663Electric FieldElectrostatic PotentialDepletion RegionECE 663Electric FieldElectrostatic Potentialy = ys(1-x/W)2Wmax = 2es(2yB)/qNAyB = (kT/q)ln(NA/ni)Depletion RegionQuestions What is the MOS capacitance? QS(yS) What are the local conditions during inversion? yS,cr How does the potential vary w
12、ith position? y(x) How much inversion charge is generated at the surface? Qinv(x,yS)Add in the oxide: how does the voltage divide? yS(VG), yox(VG)How much gate voltage do you need to invert the channel? VTHHow much inversion charge is generated by the gate? Qinv(VG)Whats the overall C-V of the MOSFE
13、T? QS(VG)Couldnt we just solvethis exactly? U = byUS = bySUB = byBExact Solutiondy/dx = -(2kT/qLD)F(yB,np0/pp0)dU/F(U) = x/LDUUSF(U) = eUB(e-U-1+U)-e-UB (eU-1-U)1/2Exact SolutiondU/F(U,UB) = x/LDUUSF(U,UB) = eUB(e-U-1+U) + e-UB (eU-1-U)1/2r = qnieUB(e-U-1) e-UB(eU-1)Exact SolutionNA = 1.67 x 1015Qin
14、v 1/(x+x0)ax0 LD . factorQuestions What is the MOS capacitance? QS(yS) What are the local conditions during inversion? yS,cr How does the potential vary with position? y(x) How much inversion charge is generated at the surface? Qinv(x,yS)Add in the oxide: how does the voltage divide? yS(VG), yox(VG)
15、How much gate voltage do you need to invert the channel? VTHHow much inversion charge is generated by the gate? Qinv(VG)Whats the overall C-V of the MOSFET? QS(VG)ECE 663Threshold Voltage for Strong InversionTotal voltage across MOS structure= voltage across dielectric plus seoxVi/tox = esys/(W/2) B
16、efore InversionAfter inversion there is a discontinuity in D due to surface Qinv Vox (at threshold) = es(2yB)/(Wmax/2)Ci = ECE 663Notice Boundary Condition !Local Potential vs Gate voltage VG = Vfb + ys + (kstox/kox)(2kTNA/e0ks)bys + eb(ys-2yB)1/2Initially, all voltage drops across channel (blue cur
17、ve). Above threshold, channel potential stays pinned to 2yB, varying only logarithmically, so that most of the gate voltage drops across the oxide (red curve).yoxysLook at Effective charge widthInitially, a fast increasing channel potential drops across increasing depletion widthEventually, a consta
18、nt potential drops across a decreasing inversion layer width, so field keeps increasing and thus matches increasing field in oxide Wdm/2tinvQuestions What is the MOS capacitance? QS(yS) What are the local conditions during inversion? yS,cr How does the potential vary with position? y(x) How much inv
19、ersion charge is generated at the surface? Qinv(x,yS) Add in the oxide: how does the voltage divide? yS(VG), yox(VG) How much gate voltage do you need to invert the channel? VTHHow much inversion charge is generated by the gate? Qinv(VG)Whats the overall C-V of the MOSFET? QS(VG)Charge vs Local Pote
20、ntial Qs (2e0kskTNA)bys + eb(ys-2yB)1/2Beyond threshold, all charge goes to inversion layerHow do we get the curvatures?EXACTAdd other terms and keepLeading termNEWInversion Charge vs Gate voltage Q eb(ys-2yB), ys- 2yB log(VG-VT)Exponent of a logarithm gives a linear variation of Qinv with VG Qinv =
21、 -Cox(VG-VT)Why Cox? Questions What is the MOS capacitance? QS(yS) What are the local conditions during inversion? yS,cr How does the potential vary with position? y(x) How much inversion charge is generated at the surface? Qinv(x,yS) Add in the oxide: how does the voltage divide? yS(VG), yox(VG) Ho
22、w much gate voltage do you need to invert the channel? VTH How much inversion charge is generated by the gate? Qinv(VG)Whats the overall C-V of the MOSFET? QS(VG)ECE 663CapacitanceFor s=0 (Flat Band):Expand exponentials.ECE 663Capacitance of whole structureTwo capacitors in series:Ci - insulatorCD -
23、 DepletionORECE 663Capacitance vs VoltageECE 663Flat Band CapacitanceNegative voltage = accumulation CCiZero voltage Flat BandECE 663CVAs voltage is increased, C goes through minimum (weak inversion) where d/dQ is fairly flatC will increase with onset of strong inversionCapacitance is an AC measurem
24、entOnly increases when AC period long wrt minority carrier lifetimeAt “high” frequency, carriers cant keep up dont see increased capacitance with voltageFor Si MOS, “high” frequency = 10-100 Hz ECE 663CV Curves Ideal MOS CapacitorECE 663But how can we operate gate attodays clock frequency ( 2 GHz!)i
25、f we cant generate minoritycarriers fast enough ( 100 Hz) ?ECE 663MOScap vs MOSFETECE 663SubstrateDrainInsulatorGateSourceChannelSubstrateInsulatorGateChannelMinority carriers generated byRG, over minority carrier lifetime 100msSo Cinv can be Cox if fast gateswitching ( GHz) Majority carriers pulled
26、 infrom contacts (fast !)Cinv = CoxMOScap vs MOSFETECE 663Example Metal-SiO2-SiNA = 1017/cm3ni 9/cm3s -14 F/cmECE 663Example Metal-SiO2-Sid=50 nm thick oxide=10-5 cmi-14 F/cmECE 663Real MIS Diode: Metal(poly)-Si-SiO2 MOS Work functions of gate and semiconductor are NOT the sameOxides are not perfect
27、Trapped, interface, mobile chargesTunnelingAll of these will effect the CV characteristic and threshold voltageECE 663Band bending due to work function differenceECE 663Work Function Differenceqs=semiconductor work function = difference between vacuum and Fermi levelqm=metal work functionqms=(qm- qs
28、)For Al, qm=4.1 eVn+ polysilicon qs=4.05 eVp+ polysilicon qs=5.05 eVqms varies over a wide range depending on dopingECE 663ECE 663SiO2-Si Interface ChargesECE 663Standard nomenclature for Oxide charges:QM=Mobile charges (Na+/K+) can causeunstable threshold shifts cleanlinesshas eliminated this issue
29、QOT=Oxide trapped charge Can be anywherein the oxide layer. Caused by brokenSi-O bonds caused by radiation damagee.g. alpha particles, plasma processes,hot carriers, EPROMECE 663QF= Fixed oxide charge positive charge layernear (2mm) Caused by incompleteoxidation of Si atoms(dangling bonds)Does not c
30、hange with applied voltageQIT=Interface trapped charge. Similar in originto QF but at interface. Can be pos, neg,or neutral. Traps e- and h during deviceoperation. Density of QIT and QF usuallycorrelated-similar mechanisms. Cureis H anneal at the end of the process.Oxide charges measured with C-V me
31、thodsECE 663Effect of Fixed Oxide ChargesECE 663ECE 663Surface RecombinationLattice periodicity broken at surface/interface mid-gap E levelsCarriers generated-recombined per unit areaECE 663Interface Trapped Charge - QITSurface states R-G centers caused by disruption of lattice periodicity at surfac
32、eTrap levels distributed in band gap, with Fermi-type distributed:Ionization and polarity will depend on applied voltage (above or below Fermi levelFrequency dependent capacitance due to surface recombination lifetime compared with measurement frequencyEffect is to distort CV curve depending on frequencyCan be passivate
溫馨提示
- 1. 本站所有資源如無(wú)特殊說(shuō)明,都需要本地電腦安裝OFFICE2007和PDF閱讀器。圖紙軟件為CAD,CAXA,PROE,UG,SolidWorks等.壓縮文件請(qǐng)下載最新的WinRAR軟件解壓。
- 2. 本站的文檔不包含任何第三方提供的附件圖紙等,如果需要附件,請(qǐng)聯(lián)系上傳者。文件的所有權(quán)益歸上傳用戶所有。
- 3. 本站RAR壓縮包中若帶圖紙,網(wǎng)頁(yè)內(nèi)容里面會(huì)有圖紙預(yù)覽,若沒(méi)有圖紙預(yù)覽就沒(méi)有圖紙。
- 4. 未經(jīng)權(quán)益所有人同意不得將文件中的內(nèi)容挪作商業(yè)或盈利用途。
- 5. 人人文庫(kù)網(wǎng)僅提供信息存儲(chǔ)空間,僅對(duì)用戶上傳內(nèi)容的表現(xiàn)方式做保護(hù)處理,對(duì)用戶上傳分享的文檔內(nèi)容本身不做任何修改或編輯,并不能對(duì)任何下載內(nèi)容負(fù)責(zé)。
- 6. 下載文件中如有侵權(quán)或不適當(dāng)內(nèi)容,請(qǐng)與我們聯(lián)系,我們立即糾正。
- 7. 本站不保證下載資源的準(zhǔn)確性、安全性和完整性, 同時(shí)也不承擔(dān)用戶因使用這些下載資源對(duì)自己和他人造成任何形式的傷害或損失。
最新文檔
- 住建部物業(yè)合同范例
- ppp模式投資合同范例
- 買斷租賃物品合同范本
- 企業(yè)與員工合同范例
- 三人合伙經(jīng)營(yíng)大車合同范例
- 可口可樂(lè)的筆試題及答案
- 借路合同范例
- 農(nóng)莊轉(zhuǎn)讓店鋪合同范例
- 2025年甘肅銀行考試試題及答案
- 2025年忍耐力測(cè)試題及答案
- GB/T 33365-2016鋼筋混凝土用鋼筋焊接網(wǎng)試驗(yàn)方法
- GB/T 16799-2018家具用皮革
- GB/T 14541-2017電廠用礦物渦輪機(jī)油維護(hù)管理導(dǎo)則
- GB 10133-2014食品安全國(guó)家標(biāo)準(zhǔn)水產(chǎn)調(diào)味品
- 講題比賽游戲中的必勝策略問(wèn)題-(取棋子游戲)課件
- 旅游學(xué)概論李天元版復(fù)習(xí)總結(jié)
- 人教版八年級(jí)上歷史思維導(dǎo)圖課件
- 重慶大學(xué)介紹課件
- 江蘇省南京市2020年中考英語(yǔ)試題
- 《電氣裝配車間生產(chǎn)工序流程卡》中英文對(duì)譯版
- 四年級(jí)下冊(cè)英語(yǔ)課件:Unit 4 There are seven days in a week-Lesson 19人教精通版
評(píng)論
0/150
提交評(píng)論