7 FPGA KC705評估開發(fā)方案

7FPGAKC705評估開發(fā)方案關鍵詞：FPGA,KC705,Kintex-7,XilinxXilinx公司的7系列FPGA包括Artix?-7,Kintex?-7和Virtex®-7三個系列,具有超高端連接帶寬,邏輯容量和信號完整性,提供低成本,小型尺寸和大容量的要求最嚴格的高性能應用.其中的Kintex-7FPGA具有最高的性價比,其所組成的收發(fā)器從600Mbps到最高的6.6Gbps,高達到28.05Gbps,主要用在航空電子,LED背光的平板電視和3DTV,LTE基帶,手持超聲設備,多模式無線電,Prosumer數碼單反照相機和視頻IP網關.本文介紹了7系列FPGA主要特性,Kintex-7FPGA系列主要特性和應用優(yōu)勢,以及評估板KC705主要特性,方框圖,評估板KC705主要元件,配置電路圖,詳細電路圖和材料清單.

Xilinx®7seriesFPGAscomprisethreenewFPGAfamiliesthataddressthecompleterangeofsystemrequirements,rangingfromlowcost,smallformfactor,cost-sensitive,high-volumeapplicationstoultrahigh-endconnectivitybandwidth,logiccapacity,andsignalprocessingcapabilityforthemostdemandinghigh-performanceapplications.The7seriesdevicesaretheprogrammablesiliconfoundationforTargetedDesignPlatformsthatenabledesignerstofocusoninnovationfromtheoutsetoftheirdevelopmentcycle.The7seriesFPGAsinclude:

?Artix?-7Family:Optimizedforlowestcostandpowerwithsmallform-factorpackagingforthehighestvolumeapplications.

?Kintex?-7Family:Optimizedforbestprice-performancewitha2Ximprovementcomparedtopreviousgeneration,enablinganewclassofFPGAs.

?Virtex®-7Family:Optimizedforhighestsystemperformanceandcapacitywitha2Ximprovementinsystemperformance.Highestcapabilitydevicesenabledbystackedsiliconinterconnect(SSI)technology.

Builtonastate-of-the-art,high-performance,low-power(HPL),28nm,high-kmetalgate(HKMG)processtechnology,7seriesFPGAsenableanunparalleledincreaseinsystemperformancewith2.9Tb/sofI/Obandwidth,2millionlogiccellcapacity,and5.3TMAC/sDSP,whileconsuming50%lesspowerthanpreviousgenerationdevicestoofferafullyprogrammablealternativetoASSPsandASICs.All7seriesdevicesshareaunifiedfourthgenerationAdvancedSiliconModularBlock(ASMBL?)column-basedarchitecturethatreducessystemdevelopmentanddeploymenttimewithsimplifieddesignportability.

7系列FPGA主要特性:

?Advancedhigh-performanceFPGAlogicbasedonreal6-inputlookuptable(LUT)technologyconfigurableasdistributedmemory.

?36Kbdual-portblockRAMwithbuilt-inFIFOlogicforon-chipdatabuffering.

?High-performanceSelectIO?technologywithsupportforDDR3interfacesupto1,866Mb/s.

?High-speedserialconnectivitywithbuilt-inmulti-gigabittransceiversfrom600Mb/stomaximumratesof6.6Gb/supto28.05Gb/s,offeringaspeciallow-powermode,optimizedforchip-to-chipinterfaces.

?Auserconfigurableanaloginterface(XADC),incorporatingdual12-bit1MSPSanalog-to-digitalconverterswithon-chipthermalandsupplysensors.

?DSPsliceswith25x18multiplier,48-bitaccumulator,andpre-adderforhighperformancefiltering,includingoptimizedsymmetriccoefficientfiltering.

?Powerfulclockmanagementtiles(CMT),combiningphase-lockedloop(PLL)andmixed-modeclockmanager(MMCM)blocksforhighprecisionandlowjitter.

?IntegratedblockforPCIExpress®(PCIe),foruptox8Gen3EndpointandRootPortdesigns.

?Widevarietyofconfigurationoptions,includingsupportforcommoditymemories,256-bitAESencryptionwithHMAC/SHA-256authentication,andbuilt-inSEUdetectionandcorrection.

?Low-cost,wire-bond,lidlessflip-chip,andhighsignalintegrityflipchippackagingofferingeasymigrationbetweenfamilymembersinthesamepackage.AllpackagesavailableinPb-freeandselectedpackagesinPboption.

?Designedforhighperformanceandlowestpowerwith28nm,HKMG,HPLprocess,1.0V