基于Spartan-6的FPGA SP601開發(fā)設(shè)計方案

基于Spartan-6的FPGASP601開發(fā)設(shè)計方案基于Spartan-6的FPGASP601開發(fā)設(shè)計方案Spartan-6是Xilinx公司的FPGA批量應用有最低成本的FPGA,采用45nm低功耗銅工藝,在成本,性能和功耗上有最好的平衡.該系列共有13個產(chǎn)品,邏輯單元從3,840到147,443,有廣泛的用途.本文介紹了Spartan-6FPGA主要特性,以及在汽娛樂系統(tǒng)應用框圖,平板顯示器應用框圖和視頻監(jiān)視系統(tǒng)應用框圖,SP601開發(fā)套件主要特性和詳細電路圖.

TheSpartan?-6familyprovidesleadingsystemintegrationcapabilitieswiththelowesttotalcostforhigh-volumeapplications.Thethirteen-memberfamilydeliversexpandeddensitiesrangingfrom3,840to147,443logiccells,withhalfthepowerconsumptionofpreviousSpartanfamilies,andfaster,morecomprehensiveconnectivity.Builtonamature45nmlow-powercopperprocesstechnologythatdeliverstheoptimalbalanceofcost,power,andperformance,theSpartan-6familyoffersanew,moreefficient,dual-register6-inputlookuptable(LUT)logicandarichselectionofbuilt-insystem-levelblocks.Theseinclude18Kb(2x9Kb)blockRAMs,secondgenerationDSP48A1slices,SDRAMmemorycontrollers,enhancedmixed-modeclockmanagementblocks,SelectIO?technology,poweroptimizedhigh-speedserialtransceiverblocks,PCIExpress?compatibleEndpointblocks,advancedsystem-levelpowermanagementmodes,auto-detectconfigurationoptions,andenhancedIPsecuritywithAESandDeviceDNAprotection.ThesefeaturesprovidealowcostprogrammablealternativetocustomASICproductswithunprecedentedeaseofuse.Spartan-6FPGAsofferthebestsolutionfor

high-volumelogicdesigns,consumer-orientedDSPdesigns,andcost-sensitiveembeddedapplications.Spartan-6FPGAsaretheprogrammablesiliconfoundationforTargetedDesignPlatformsthatdeliverintegratedsoftwareandhardwarecomponentsthatenabledesignerstofocusoninnovationassoonastheirdevelopmentcyclebegins.

Spartan-6FPGA主要特性:

?Spartan-6Family:

?Spartan-6LXFPGA:Logicoptimized

?Spartan-6LXTFPGA:High-speedserialconnectivity

?Designedforlowcost

?Multipleefficientintegratedblocks

?OptimizedselectionofI/Ostandards

?Staggeredpads

?High-volumeplasticwire-bondedpackages

?Lowstaticanddynamicpower

?45nmprocessoptimizedforcostandlowpower

?Hibernatepower-downmodeforzeropower

?Suspendmodemaintainsstateandconfigurationwithmulti-pinwake-up,controlenhancement

?Lower-power1.0Vcorevoltage(LXFPGAs,-1Lonly)

?Highperformance1.2Vcorevoltage(LXandLXTFPGAs,-2,-3,and-4speedgrades)

?Multi-voltage,multi-standardSelectIO?interfacebanks

?Upto1,050Mb/sdatatransferrateperdifferentialI/O

?Selectableoutputdrive,upto24mAperpin

?3.3Vto1.2VI/Ostandardsandprotocols

?Low-costHSTLandSSTLmemoryinterfaces

?Hotswapcompliance

?AdjustableI/Oslewratestoimprovesignalintegrity

?High-speedGTPserialtransceiversintheLXTFPGAs

?Upto3.125Gb/s

?High-speedinterfacesincluding:SerialATA,Aurora,1GEthernet,PCIExpress,OBSAI,CPRI,EPON,GPON,DisplayPort,andXAUI

?IntegratedEndpointblockforPCIExpressdesigns(LXT)

?Low-costPCI?technologysupportcompatiblewiththe33MHz,32-and64-bitspecification.

?EfficientDSP48A1slices

?High-performancearithmeticandsignalprocessing

?Fast18x18multiplierand48-bitaccumulator

?Pipeliningandcascadingcapability

?Pre-addertoassistfilterapplications

?IntegratedMemoryControllerblocks

?DDR,DDR2,DDR3,andLPDDRsupport

?Dataratesupto800Mb/s(12.8Gb/speakbandwidth)

?Multi-portbusstructurewithindependentFIFOtoreducedesigntimingissues

?Abundantlogicresourceswithincreasedlogiccapacity

?OptionalshiftregisterordistributedRAMsupport

?Efficient6-inputLUTsimproveperformanceandminimizepower

?LUTwithdualflip-flopsforpipelinecentricapplications

?BlockRAMwithawiderangeofgranularity

?FastblockRAMwithbytewriteenable

?18Kbblocksthatcanbeoptionallyprogrammedastwoindependent9KbblockRAMs

?ClockManagementTile(CMT)forenhancedperformance

?Lownoise,flexibleclocking

?DigitalClockManagers(DCMs)eliminateclockskewanddutycycledistortion

?Phase-LockedLoops(PLLs)forlow-jitterclocking

?Frequencysynthesiswithsimultaneousmultiplication,division,andphaseshifting

?Sixteenlow-skewglobalclocknetworks

?Simplifiedconfiguration,supportslow-coststandards

?2-pinauto-detectconfiguration

?Broadthird-partySPI(uptox4)andNORflashsupport

?FeaturerichXilinxPlatformFlashwithJTAG

?MultiBootsupportforremoteupgradewithmultiplebitstreams,usingwatchdogprotection

?Enhancedsecurityfordesignprotection

?UniqueDeviceDNAidentifierfordesignauthentication

?AESbitstreamencryptioninthelargerdevices

?Fasterembeddedprocessingwithenhanced,lowcost,MicroBlaze?softprocessor

?Industry-leadingIPandreferencedesigns

Spartan-6FPGA器件列表:

Spartan-6FPGAsstorethecustomizedconfigurationdatainSRAM-typeinternallatches.Thenumberofconfigurationbitsisbetween2.6Mband33Mbdependingondevicesizebutindependentofthespecificuser-designimplementation,unlesscompressionmodeisused.TheconfigurationstorageisvolatileandmustbereloadedwhenevertheFPGAispoweredup.

ThisstoragecanalsobereloadedatanytimebypullingthePROGRAM_BpinLow.Severalmethodsanddataformatsforloadingconfigurationareavailable.

Bit-serialconfigurationscanbeeithermasterserialmode,wheretheFPGAgeneratestheconfigurationclock(CCLK)signal,orslaveserialmode,wheretheexternalconfigurationdatasourcealsoclockstheFPGA.Forbyte-wideconfigurations,masterSelectMAPmodegeneratestheCCLKsignalwhileslaveSelectMAPmodereceivestheCCLKsignalforthe8-and16-bit-widetransfer.Inmasterserialmode,thebeginningofthebitstreamcanoptionallyswitchtheclockingsourcetoanexternalclock,whichcanbefasterormoreprecisethantheinternalclock.TheavailableJTAGpinsuseboundary-scanprotocolstoloadbit-serialconfigurationdata.

圖1.Spartan-6FPGA在汽娛樂系統(tǒng)應用框圖

Servingasacompaniontothehostprocessor,asingleSpartan-6LX45TFPGAsupportsaudio/videoacceleration,graphicssubsystem,andvehiclenetworkingfunctions.

圖2.Spartan-6FPGA在平板顯示器應用框圖

High-ResolutionVideoFlat-PanelDisplaywithDynamicBacklightControl

AchievehigherimagequalitywhilereducingpowerandcostusingSpartan-6FPGAswithintegratedserialI/Ocapabilities.

圖3.Spartan-6FPGA在視頻監(jiān)視系統(tǒng)應用框圖

SurveillanceImageCaptureandAnalyticsEngine

Integratesensorinterfacing,videoanalytics,imageenhancementandnetworkinterfacinginasingleSpartan-6LX150TFPGA.

TheSpartan?-6familyprovidesleadingsystemintegrationcapabilitieswiththelowesttotalcostforhigh-volumeapplications.Thethirteen-memberfamilydeliversexpandeddensitiesrangingfrom3,400to148,000logiccells,withhalfthepowerconsumptionofpreviousSpartanfamiliesandfaster,morecomprehensiveconnectivity.

Builtonamature45nmlow-powercopperprocesstechnologythatdeliverstheoptimalbalanceofcost,power,andperformance,theSpartan?-6familyoffersanew,moreefficient,dual-register6-inputlook-uptable(LUT)logicandarichselectionofbuilt-insystem-levelblocks.Theseinclude18KbblockRAMs,secondgenerationDSP48A1slices,SDRAMmemorycontrollers,enhancedmixed-modeclockmanagementblocks,SelectIO?technology,power-optimizedhigh-speedserialtransceiverblocks,PCIExpress?compatibleEndpointblocks,advancedsystem-levelpowermanagementmodes,autodetectconfigurationoptions,andenhancedIPsecuritywithAESandDeviceDNAprotection.Thesefeaturesprovidealow-costprogrammablealternativetocustomASICproductswithunprecedentedease-of-use.Spartan?-6FPGAsaretheprogrammablesiliconfoundationforTargetedDesignPlatformsthatdeliverintegratedsoftwareandhardwarecomponentstoenabledesignerstofocusoninnovationassoonastheirdevelopmentcyclebegins.

SP601評估套件

TheSP601EvaluationKitisbasedontheXC6SLX16-2CSG324Spartan-6FPGA.ThisFPGAcontains14,579logiccells,aratingthatreflectstheincr